Agency of Industrial Science and Technology

Kogyo Gijutsuin

Matsushita Electric Works, Ltd.

Ministry of International Trade & Industry

Citizen Watch Company, Ltd.

Kabushiki Kaisha Daini Seikosha

Taiyo Yuden Kabushiki Kaisha

Yutaka Hayashi

Yasuo Tarui

Shigeaki Tomonari

Keizi Kakite

Yoshikazu Kojima

Jun Sakai

Masaaki Kamiya

Kojiro Tanaka

Hisato Hiraishi

Hideyo Iida

Mitsuyuki Yamanaka

Toshio Mishuku

Hideyuki Karasawa

Seiichi Ishihara

Toshihiro Sekigawa

Kiyoko Nagai

An optical control circuit is formed by a first transistor, a first resistive element connected between control electrode and first output electrode of the first transistor. The first output electrode forms an emitter or source of the transistor, a second resistive element is connected between the control electrode and second output electrode of the first transistor. The second output electrode forms a collector or drain of the transistor and an array of photovoltaic elements is connected in parallel to the second resistive element. A second transistor has a control electrode connected to the second output electrode of the first transistor. High speed operation of the second transistor can be assured, any noise voltage applied to the control electrode of the second transistor can be effectively bypassed, and the first transistor can be simultaneously formed in a substrate of the second transistor to be integralized therewith.

Optical control circuit and a semiconductor device for realizing same

An optical control circuit is formed by connecting a photoconductive element and resistive element at their one end to the control electrode of a transistor, while connecting the other end of the photoconductive element to one of output electrodes of the transistor and the other end of the resistive element to a predetermined voltage supply point. With this simple circuit arrangement, an effective input control with respect to the control electrode of the transistor can be realized.

Optical control circuit and semiconductor device for realizing the

An optical information processing device includes a light receiving and driving circuit including photo voltaic elements adapted to receive an incident light and to produce a drive voltage, and an optical shutter driven by the drive voltage produced by the light receiving and driving circuit. With this structure, various basic logical operations are performed by the device according to the present invention. As a feature of the invention, the device receives a pair of incident lights having a complementary relation in strength with each other and produces a pair of output lights from the optical shutters which also are complementary in strength with each other. Thus, the possibility of errors in logical operations is greatly reduced.

Optical information processing device using optical shutter elements

A photoelectric transducer comprising at least a light-transmissive substrate having a relatively flat surface provided on its light-receiving side and an uneven surface provided on its opposite side, and a photoelectric transducing layer provided on the uneven surface of the substrate. The photoelectric transducing layer comprises at least a light-transmissive conductive layer, a semiconductor layer, and a back conductive electrode layer. The back conductive electrode layer comprises a second light-transmissive conductive layer and a conductive layer. The uneven surface on the substrate includes numerous projections, each projection having a triangular section and a shape of pyramidal, ridged roof, or conical type. The projections and the second light-transmissive conductive layer of the uneven back conductive electrode layer elongate the optical path of light beams in the photoelectric transducing layer, and prevent the adherence of dust particles and the abrasion of the photoelectric transducing layer.

Photoelectric transducer

In the non-volatile semiconductor memory of present invention, a select gate and a floating gate are formed on the surface portion of the substrate between a source region and the drain region also acting as a control gate through a gate oxide film. A part of a channel current is injected into the floating gate at the surface portion under the edge of the floating gate covered by the select gate.

Non-volatile semiconductor memory

In the deposition of a hydrogen-containing semiconductor film on a metal substrate, the electric contact characteristic between the metal substrate and the semiconductor film is improved by preparatorily exposing to hydrogen plasma the surface of the metal substrate on which the semiconductor film is to be deposited.

Method for treatment of metal substrate for growth of

Disclosed is a field-effect transistor device which is capable of storing pieces of analogue information in the form of charge stored in a charge-storing means. A memory device according to this invention comprises, drain and source regions in a semi-conductor substrate, an insulating layer lying on the major surface of the substrate and an elongated resistive gate region lying on the insulating layer between the drain and source regions and having two electrodes provided on the opposite ends of the gate region. When a voltage below the critical voltage of charge injection is applied to one of the electrodes whereas a voltage above the critical voltage and representative of analogue information is applied to the other electrode, the area of charge injection in the charge-storing mechanism of the insulating layer varies with the latter 'writing' voltage, thus realizing the storage of analogue information if said area is filled with electric charge. The piece of analogue information thus stored is read in terms of source-to-drain current.

Nonvolatile memory semiconductor device

In an element of an integrated circuit including a transistor and a 'majority carrier diode' at least one terminal of which is connected to the base or collector of said transistor, the 'majority carrier diode' is laid out in a transistor portion of the integrated circuit to be surrounded by a part of base region extended to the surface of the semiconductor body, so that the paths for the load current of the transistor and the diode current are separated from each other, whereby a high speed operation at a heavy load current is made possible and/or so that reliability of said majority carrier diode is increased.

High speed element of an integrated circuit with a majority carrier

Disclosed herein is an improved field-effect transistor, having its effective base width determined by the impurity diffusion length or by a difference between impurity diffusion lengths for providing a reduced parasitic capacitance between gate and drain, and/or between gate or drain and other electrode. Disclosed also is a construction for effectively leading out an electrode from the base region and or source region, and methods adapted to manufacture the above-mentioned field-effect transistor.

Field-effect transistor

A semiconductor non-volatile optical memory device is constructed by providing light-permeable charge retention means in an insulating layer on a first semiconductor surface into which photo-generated carriers in the surface of the first semiconductor region are injected over the semiconductor-insulator potential barrier by applying reverse bias between the first semiconductor region and a second region forming a rectifying junction with the first semiconductor region. Also disclosed in a non-volatile memory integrated circuit employing one or more of said devices together with light source in the same package. The non-volatile memory integrated circuit operates under low bias voltage and is compatible with a high speed integrated logic circuits.

Semi-conductor non-volatile optical memory device

A high frequency insulated gate field effect transistor comprises a semiconductor body of one type of conductivity, a base region of the same type of conductivity as the semiconductor body but with a higher impurity concentration than the body, and drain and source regions of the opposite type of conductivity. A portion of the base region is disposed between the drain region and the source region and the impurity concentration of the base region is reduced from the source region toward the drain region and is less at its junction with the drain region than that of the drain region. Such transistor can be incorporated in an integrated circuit as an amplifier transistor with a depletion type transistor as a load transistor. A common region serves both as a drain region of the amplifier transistor and a source region of the load transistor. A process of making the transistor and the integrated circuit comprises masking a semiconductor body, forming windows in the mask and successively diffusing through the same window both a first impurity to form the base region and a second impurity to form the source region.

Growing community of inventors

Ibaragi, Japan

Yutaka Hayashi