Sony Corporation

Other

Agency of Industrial Science and Technology

Seiko Instruments Inc

Renesas Electronics Corporation

National Institute of Advanced Industrial Science and Technology

Ricoh Company, Ltd.

Taiyo Yuden Co., Ltd.

Ministry of International Trade & Industry

Agency of Industrial Science and Technology Ministry of International

Hitachi Chemical Company, Ltd.

Research Development Corporation of Japan

Seiko Instruments & Electronics Ltd.

Japan as Represented by Director General of Agency of Industrial Science

Funai Electric Company Ltd.

Yutaka Hayashi

Mikio Mukai

Jun Osanai

Hisashi Hasegawa

Takeshi Matsushita

Yoshifumi Yoshida

Hideyo Iida

Mitsuyuki Yamanaka

Yasushi Nagamune

Machio Yamagishi

Yoshikazu Kojima

Hiroaki Takasu

Hirofumi Watanabe

Masaaki Kamiya

Takaaki Negoro

Akihiro Nakamura

Kentaro Hayashi

Kojiro Tanaka

Toshitaka Ota

Jun-ichi Nishizawa

Toshio Kobayashi

Masaaki Sato

Kazuhiro Yoneda

Minoru Takeda

Masatoshi Ono

Ichiro Fujiwara

Yuichiro Masuda

Katsuhiko Aisu

Hidehiro Nakamura

Kazuhiko Matsumoto

Shigeo Furuta

Tsuyoshi Takahashi

Yasutoshi Komatsu

Hiroshi Aozasa

Toshio Mishuku

Kenichi Ishii

Atuo Itoh

Kikuji Fukai

Nobuyasu Shiba

Kazunari Kimino

Nobuo Hashizume

Shoji Nakanishi

Iwao Hamaguchi

Shunsuke Fujita

Eiichi Suzuki

Mizuho Imai

Yasushi Kondo

Akira Li

Touru Sumiya

Atsuo Itoh

Yuji Muramatsu

Hideyuki Karasawa

Sumitaka Goto

Kiyohiko Kobayashi

Takashi Yoshimi

Hirofumi Yoshihara

Tatsuo Takahashi

Yasushi Kondoh

Eita Kinoshita

Tooru Nakamura

Teiji Hasegawa

Yuji Kawanishi

Masahiko Einaga

Takafumi Kamimura

Atsuo Itou

Toshitaka Ohta

Mithuyuki Yamanaka

An ECU includes a boosting circuit that boosts an input power supply voltage, a backup capacitor that charges a backup power supply in accordance with a boosted voltage boosted by the boosting circuit, an airbag ignition circuit that drives an airbag with the backup power supply charged by the backup capacitor as a driving power supply, and a bidirectional current limiting unit that limits a charging current flowing from the boosting circuit to the backup capacitor and limits a backflow current flowing from the backup capacitor to the boosting circuit.

Airbag control device and semiconductor device

There is to provide a power circuit capable of stabilizing an internal power source voltage and assuring a normal operation of a load circuit. According to one embodiment, the power circuit includes a regulator which generates an output voltage using an entered input voltage, a voltage detecting circuit which detects the output voltage, and a clamp circuit which outputs an internal power source voltage based on the output voltage and in a first failure that the output voltage is larger than a predetermined first voltage, outputs the internal power source voltage suppressed to the first voltage and less, in which the clamp circuit outputs the internal power source voltage to the logic circuit which operates with the internal power source voltage of the first voltage and less and the voltage detecting circuit outputs the first failure to the logic circuit when detecting the first failure.

Power circuit

Provided is an ESD protection circuit including: a power MOS transistor provided between an external connection terminal and a reference voltage terminal; a clamping circuit that is provided between the external connection terminal and a gate of the power MOS transistor and clamps a voltage between the external connection terminal and the gate of the power MOS transistor at a predetermined value or less; a first resistive element provided between the gate and a source of the power MOS transistor; and a MOS transistor that is provided in series with the power MOS transistor and has a gate and a source which are commonly connected to each other.

ESD protection circuit, semiconductor device, on-vehicle electronic device, and on-vehicle electronic system

A semiconductor integrated circuit that is used for a stabilizing power supply circuit which supplies an output power supply voltage to a parallel connection of a smoothing capacitor and a load, from an input power supply voltage, includes an error amplifier that detects an error of the output power supply voltage, an output control circuit that is connected between the input terminal and the output terminal, a phase compensation circuit that is connected to the error amplifier, and a detection control circuit that is connected to the phase compensation circuit.

Semiconductor integrated circuit and method for operating the same for a stabilizing power supply

A sense circuit includes a differential amplifier circuit including an inverting input section, a non-inverting input section and an output section, an electrical capacitor connected between the inverting input section and the output section, and a field effect transistor including a source, a drain, and a gate. One of the source and the drain is connected to the inverting input section, and the other of the source and the drain is connected to the output section. A reference potential is supplied to the non-inverting input section, and an output section of a photoelectric conversion cell having an added switching function is connected to the inverting input section.

Sense circuit and method of operation thereof and photoelectric conversion array connected to inverting input of sense circuit

A reset method of an photoelectric conversion device at least including a phototransistor having a first collector, a first base, and a first emitter, and a first field-effect transistor having a first source, a first drain, and a first gate, includes: connecting the first base, and one of the first source and the first drain of the first field-effect transistor by having a common region, or a continuous region, without a base electrode; supplying a base reset potential to the other of the first source and the first drain; and overlapping a time in which a first emitter potential is supplied to the first emitter and a time in which a first ON-potential that turns on the first field-effect transistor is supplied to the first gate.

Method for resetting photoelectric conversion device, and photoelectric conversion device

The semiconductor device includes a power transistor that is disposed between a first signal line, which is coupled to a first external terminal, and a second signal line, which is coupled to a second external terminal. A gate electrode of the power transistor is coupled to a third signal line. The semiconductor device further includes a clamp circuit that clamps a voltage between the first signal line and the third signal line, a first resistive element that is disposed between the third signal line and the second signal line, and a monitoring section that monitors a voltage between the third signal line and the second signal line. The clamp circuit is configured so that a clamp voltage can be changed. The monitoring section exercises control to decrease the clamp voltage when the voltage between the third signal line and the second signal line exceeds a predefined threshold value.

Semiconductor device

This invention provides a sensor having such a structure that the area in which a sensor electrode comes into contact with a liquid, a mist or a gas containing an analyte has been previously specified. The sensor comprises at least an electroconductive first electrode, an electroconductive second electrode, electroconductive first and second wirings connected to the first and second electrodes, and an insulating part for insulating the first and second wirings from each other and from a liquid, a mist or a gas containing the analyte. The insulating part is formed of an organic material. In the first and second electrodes, at least the surface, which comes into contact with a liquid, a mist or a gas containing the analyte, is formed of a material which is insoluble in a liquid or a mist containing the analyte, or is not attacked by a gas containing the analyte.

Sensor, sensor system, portable sensor system, method of analyzing metal ions, mounting substrate, method of analyzing plating preventing chemical species, method of analyzing produced compound, and method of analyzing monovalent copper chemical species

A field effect transistor has an insulating substrate, a semiconductor thin film formed on the insulating substrate, and a gate insulating film on the semiconductor thin film. A first gate electrode is formed on the gate insulating film. A first region and a second region having a first conductivity type are formed on or in a surface of the semiconductor film on opposite sides of the first gate electrode in a length direction thereof. A third region having a second conductivity type opposite the first conductivity type is arranged on or in the semiconductor film side by side with the second region in a width direction of the first gate electrode. The third region and the second region are in contact with each other and make a low resistance junction. A second gate electrode is formed on the gate insulating film along the second region. A fourth region having the first conductivity type is formed on or in the semiconductor film on an opposite side of the second region with respect to the second gate electrode. One of the first and the fourth regions is used as an output region according to a circuit operation.

Field effect transistor formed on an insulating substrate and integrated circuit thereof

A high voltage operating field effect transistor has a substrate and a semiconductor channel formation region disposed in a surface of the substrate. A source region and a drain region are spaced apart from each other with the semiconductor channel formation region disposed between the source region and the drain region. A gate insulating film region is disposed on the semiconductor channel formation region. A resistive gate region is disposed on the gate insulating film region. A source side electrode is disposed on a source region side of the resistive gate region and is operative to receive a signal electric potential. A drain side electrode is disposed on a drain region side of the resistive gate region and is operative to receive a bias electric potential an absolute value of which is equal to or larger than that of a specified electric potential and which changes according to an increase or decrease in a drain electric potential.

Method of high voltage operation of a field effect transistor

The present invention is made to realize a two dimensional optical sensor array having improved performance, for instance, at least one of improved response time, improved intermixing problem, improved dynamic range, improved ability to sense a lower illuminance optical image and improved signal to noise ratio. For these purposes, an optical sensor array with a novel sensing method is proposed. For sensing each of the optical sensor in the array, one of a selected group of plurality of interconnecting means is selected and is driven from a first electrical potential to a second electrical potential while rest of the selected group of plurality of interconnecting means are kept to the first electrical potential, then, photo-electrical current from optical sensors connected to the selected one of the selected group of plurality of interconnecting means is sequentially sensed at around the second electrical potential through the selected one of the selected group of plurality of interconnecting means, by sequentially driving each one of unselected group of plurality of interconnecting means from a third electrical potential to a fourth electrical potential and then from the fourth electrical potential to the third electrical potential.

Optical sensor array, sensing method and circuit therefore, and device and apparatus thereby

A high voltage operating field effect transistor has a substrate, a source region and a drain region which are spaced apart from each other in a surface of the substrate, a semiconductor channel formation region disposed in the surface of the substrate between the source region and the drain region, a gate region disposed above the channel formation region, and a gate insulating film region disposed between the channel formation region and the gate region. At least one of a signal electric potential and a signal current is supplied to the source region, and a bias electric potential having an absolute value equal to or larger than a first constant electric potential which changes according to an increase or decrease in a drain electric potential is supplied to the gate region. One end of a rectifying device is connected to the gate region, and a second constant electric potential is supplied to the other end of the rectifying device.

High voltage operating field effect transistor, bias circuit therefor and high voltage circuit thereof

A floating non-volatile memory has a substrate and source and drain regions disposed in a surface region of the substrate and spaced apart from each other with a channel forming semiconductor region disposed therebetween. A gate insulating film is disposed on the channel forming semiconductor region. A single crystal control region is disposed in the surface region of the substrate and is electrically separated from the channel forming semiconductor region. A control gate insulating film is disposed on the single crystal control region. A floating gate is disposed on the control gate insulating film and is capacitively coupled with the single crystal control region. A chemical-vapor-deposited shield insulating film is formed in a gas atmosphere charge-balanced on the floating gate. A shield conductive film is disposed on the chemical-vapor-deposited shield insulating film and capacitively coupled with the floating gate.

Floating gate non-volatile memory

A high voltage operating field effect transistor has a substrate, a semiconductor channel formation region disposed in a surface of the substrate, a source region and a drain region which are spaced apart from each other with the semiconductor channel formation region disposed between the source region and the drain region, a gate insulating film region disposed on the semiconductor channel formation region, a resistive gate region disposed on the gate insulating film region, a source side electrode disposed on a source region end portion side of the resistive gate region, and a drain side electrode disposed on a drain region end portion side of the resistive gate region. A signal electric potential is supplied to the source side electrode, and a bias electric potential an absolute value of which is equal to or larger than that of a specified electric potential and which changes according to an increase or decrease in a drain electric potential is supplied to the drain side electrode.

High voltage operating field effect transistor, and bias circuit therefor and high voltage circuit thereof

Growing community of inventors

Ibaraki, Japan

Yutaka Hayashi