Tokyo Electron Limited

Yusuke Yoshida

Sergey Alexandrovich Voronin

Alok Ranjan

Christopher Talone

Naoki Matsumoto

Masayuki Kohno

Jun Yoshikawa

Michitaka Aita

Shyam Sridhar

Jason Marion

Christopher Catano

Ryou Son

Ippei Shimizu

Nicholas Joy

Koji Koyama

Yoshio Ishikawa

Naoki Mihara

Takahiro Senda

Takashi Enomoto

David Coumou

Caitlin Philippi

Yoshikazu Azumaya

Sang Cheol Han

Junsuke Hoshiya

Masami Sudayama

Scott E White

Yukiyoshi Aramaki

Residue at the base of a feature in a substrate to be etched is limited so that improved profiles may be obtained when forming vertical, narrow pitch, high aspect ratio features, for example fin field effect transistor (FinFET) gates. A thin bottom layer of the feature is formed of a different material than the main layer of the feature. The bottom material may be comprised of a material that preferentially etches and/or preferentially oxidizes as compared to the main layer. The bottom layer may comprise silicon germanium. The preferential etching characteristics may provide a process in which un-etched residuals do not remain. Even if residuals remain, after etch of the feature, an oxidation process may be performed. Enhanced oxidation rates of the bottom material allow any remaining residual to be oxidized. Plasma oxidation may be used. The oxidized material may then be removed by utilizing standard oxide removal mechanisms.

Method for gate stack formation and etching

In an example, a method includes depositing a first sidewall spacer layer over a substrate having a layer stack including alternating layers of a nanosheet and a sacrificial layer, and a dummy gate formed over the layer stack, the first sidewall spacer layer formed over the dummy gate. The method includes depositing a metal-containing liner over the first sidewall spacer layer; forming a first sidewall spacer along the dummy gate by anisotropically etching the metal-containing liner and the first sidewall spacer layer; performing an anisotropic etch back process to form a plurality of vertical recesses in the layer stack; laterally etching the layer stack and form a plurality of lateral recesses between adjacent nanosheets; depositing a second sidewall spacer layer to fill the plurality of lateral recesses; and etching a portion of the second sidewall spacer layer to expose tips of the nanosheet layers.

Metal-containing liner process

In one example, a method of processing a substrate includes receiving a substrate in a processing chamber, the substrate having an etch mask positioned over an underlying layer to be etched, where the underlying layer is a silicon-containing layer. The method includes executing a first etch process that includes forming a first plasma from a first process gas that includes hydrogen bromide or chlorine and etching the underlying layer using products of the first plasma. The method includes executing a second etch process that includes forming a second plasma from a second process gas that includes fluorine and etching the substrate using products from the second plasma. The method may include alternating between the first etch process and the second etch process.

Plasma etch processes

Plasma ion energy distribution for ions having different masses is controlled by controlling the relationship between a base RF frequency and a harmonic RF frequency. By the controlling the RF power frequencies, characteristics of the plasma process may be changed based on ion mass. The ions that dominate etching may be selectively based upon whether an ion is lighter or heavier than other ions. Similarly, atomic layer etch processes may be controlled such that the process may be switched between a layer modification step and a layer etch step though adjustment of the RF frequencies. Such switching is capable of being performed within the same gas phase of the plasma process. The control of the RF power includes controlling the phase difference and/or amplitude ratios between a base RF frequency and a harmonic frequency based upon the detection of one or more electrical characteristics within the plasma apparatus.

Method for ion mass separation and ion energy control in process plasmas

Embodiments are described herein that form silicon germanium nano-wires while reducing or eliminating erosion of nitride layers (e.g., masks and spacers) caused during selective etching of silicon with respect to silicon germanium during formation of silicon germanium nano-wires. oxide layers are used to protect nitride layers during formation of silicon germanium (SiGe) nano-wires. In particular, multilayer spacers including oxide/nitride/oxide layers are formed to protect the nitride layers during selective silicon etch processes that are used to form silicon germanium nano-wires, for example, for field effect transistors (FETs). The multilayer spacers allow for target levels of erosion to be achieved for the nitride layers.

Methods to protect nitride layers during formation of silicon germanium nano-wires in microelectronic workpieces

Methods are disclosed to detect plasma light emissions during plasma processing, to analyze light intensity data associated with the plasma source, and to adjust operating parameters for the plasma source and/or the process chamber based upon light intensity distributions associated with the plasma processing. The light intensity distributions for the plasma sources and related analysis can be conducted across multiple processing tools. For some embodiments, plasma discharge stability and/or chamber-to-chamber matching information is determined based upon light intensity data, and the operation of the processing tools are adjusted or controlled based upon stability and/or matching determinations. The disclosed embodiments thereby provide simple, low-cost solutions to assess and improve plasma sources and discharge stability for plasma processing tools such as plasma etch and deposition tools.

Methods for stability monitoring and improvements to plasma sources for plasma processing

Systems and methods are disclosed for plasma discharge ignition to reduce surface particles and thereby decrease defects introduced during plasma processing. A microelectronic workpiece is positioned on a holder within a process chamber that includes a first radio frequency (RF) power source configured to couple RF power to a top portion of the process chamber, a second RF power source configured to couple RF power to the holder, and a direct current (DC) power supply. Initially, a process gas for plasma process is flowed into the process chamber. The process gas is ignited to form plasma by activating the second RF power source to apply RF power to the holder. Subsequently, the microelectronic workpiece is clamped to the holder by applying the positive voltage to the holder with the DC power supply, and the first RF power source is activated to maintain the plasma within the process chamber.

System and method of plasma discharge ignition to reduce surface particles

A plasma processing apparatus is provided that is configured to supply a gas into a chamber, generate a plasma from the gas using a power of an electromagnetic wave, and perform a predetermined plasma process on a substrate that is held by a mounting table. The plasma processing apparatus includes a dielectric window through which the electromagnetic wave that is output from an electromagnetic wave generator is propagated and transmitted into the chamber, a support member that supports the dielectric window, a partition member that separates a space where the support member is arranged from a plasma generation space and includes a protrusion abutting against the dielectric window, and a conductive member that is arranged between the partition member and the dielectric window and is protected from being exposed to the plasma generation space by the protrusion.

Plasma processing apparatus

A plasma processing apparatus includes a processing chamber, a table disposed in the processing chamber, a dielectric window provided at the processing chamber, and a surrounding body made of a dielectric material surrounding a processing space between the table and the dielectric window. The dielectric window and the surrounding body are separated from each other in a vertical direction with a predetermined gap therebetween.

A temperature measuring method for measuring a temperature of a member corresponding to a measuring object arranged within a chamber of a plasma processing apparatus is provided. The temperature measuring method involves obtaining a function (f) for correcting a correction target temperature (T) according to a measurement window temperature (T), the function (f) being computed based on the correction target temperature (T) corresponding to a temperature of the measuring object measured via a measurement window arranged at the chamber, a reference temperature (T) corresponding to a temperature of the measuring object measured without using the measurement window, and the measurement window temperature (T) corresponding to a temperature of the measurement window. The temperature measuring method further involves measuring the correction target temperature (T), measuring the measurement window temperature (T), and correcting the correction target temperature (T) according to the measurement window temperature (T) based on the obtained function (f).

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Albany, NY, United States of America

Yusuke Yoshida