Murata Manufacturing Co., Ltd.

Yusuke Tanaka

Satoshi Tanaka

Takayuki Tsutsui

Kazuhito Nakai

Satoshi Arayashiki

Kazuo Watanabe

Shigeki Koya

Satoshi Goto

Kenji Tahara

Hayato Nakamura

Kenichi Shimamoto

Jun Enomoto

Masatoshi Hase

Fumio Harima

Hiroshi Masuda

Masayuki Aoike

Takeshi Kogure

Koshi Himeda

Syunji Yoshimi

Kunihiro Watanabe

Naohide Tomita

Kazuhiro Ikarashi

Makoto Itou

Hiroki Shounai

Seikoh Ono

Makoto Ito

Increase in power-added efficiency can be achieved. A second base of a second transistor is connected to a first collector of a first transistor. A third base of a third transistor is connected to the first collector of the first transistor, and a third collector of the third transistor is connected to a second collector of the second transistor. A second bias circuit includes a fifth transistor connected to the second base of the second transistor. A third bias circuit includes a sixth transistor connected to the third base of the third transistor. A first current limiting circuit includes a seventh transistor, a first collector resistor, and a first base resistor. A second current limiting circuit includes an eighth transistor, a second collector resistor, and a second base resistor.

Power amplifier circuit, high frequency circuit, and communication apparatus

The present disclosure facilitates impedance matching between a power amplifier and filters. A radio-frequency circuit includes a power amplifier, a plurality of transmit filters, a switch, a plurality of first matching networks, and a second matching network. The switch switches the plurality of transmit filters to be coupled to the power amplifier. The plurality of first matching networks are coupled between the plurality of transmit filters and the switch. The second matching network is coupled between the power amplifier and the switch. The second matching network includes a transmission line transformer.

Radio-frequency circuit and communication device

A matching circuit performs output impedance matching for an amplifier that amplifies an input signal and outputs an amplified signal. The matching circuit includes a low pass filter and a high pass filter. The ground of the low pass filter and the ground of the high pass filter are isolated from each other.

Matching circuit

A power amplifier circuit includes a first transistor having an emitter electrically connected to a common potential, a base to which a first high-frequency signal is input, and a collector from which a third high-frequency signal is output; a second transistor having an emitter electrically connected to the common potential, a base to which a second high-frequency signal is input, and a collector from which a fourth high-frequency signal is output; a first capacitance circuit electrically connected between the collector of the second transistor and the base of the first transistor; and a second capacitance circuit electrically connected between the collector of the first transistor and the base of the second transistor.

Power amplifier circuit

A power amplifier circuit includes a lower transistor having a first terminal, a second terminal connected to ground, and a third terminal, wherein a first power supply voltage is supplied to the first terminal, and an input signal is supplied to the third terminal; a first capacitor; an upper transistor having a first terminal, a second terminal connected to the first terminal of the lower transistor via the first capacitor, and a third terminal, wherein a second power supply voltage is supplied to the first terminal, an amplified signal is outputted to an output terminal from the first terminal, and a driving voltage is supplied to the third terminal; a first inductor that connects the second terminal of the upper transistor to ground; a voltage regulator circuit; and at least one termination circuit that short-circuits an even-order harmonic or odd-order harmonic of the amplified signal to ground potential.

A semiconductor device includes a plurality of unit transistors that are arranged on a surface of a substrate in a first direction. Input capacitive elements are arranged so as to correspond to the unit transistors. An emitter common wiring line is connected to emitter layers of the unit transistors. A via-hole extending from the emitter common wiring line to a back surface of the substrate is disposed at a position overlapping the emitter common wiring line. A collector common wiring line is connected to collector layers of the unit transistors. The input capacitive elements, the emitter common wiring line, the unit transistors, and the collector common wiring line are arranged in this order in a second direction. Base wiring lines that connect the input capacitive elements to base layers of the corresponding unit transistors intersect the emitter common wiring line without physical contact.

Semiconductor device

A power amplifier circuit includes a power amplifier including a first transistor having a first terminal connected to a reference potential, a second terminal to which a first current and a radio-frequency signal are input, and a third terminal connected to a first power supply potential via a first inductor; a capacitor connected to the third terminal of the first transistor; a second transistor including a first terminal connected to the capacitor and the reference potential via a second inductor, a second terminal to which a second current is input and is connected to the reference potential, and a third terminal connected to the first power supply potential via a third inductor and outputs signal; and an adjustment circuit that outputs a third current corresponding to the first power supply potential or a second power supply potential to the second terminal of the second transistor.

A power amplifier circuit includes first and second bias circuits configured to provide first and second biases, respectively, a first transistor having an emitter connected to a reference potential, a base configured to receive the first bias via a first resistor and receive a radio-frequency input signal via a first capacitor, and a collector configured to output an amplified radio-frequency signal, a second transistor having a base connected to the reference potential via a second capacitor and configured to receive the second bias via a second resistor, an emitter configured to receive the radio-frequency signal, and a collector connected to a power supply potential via a third inductor and configured to output a radio-frequency output signal, and an impedance circuit having a first end connected to an output section of the second bias circuit and configured to apply an alternating-current signal to a path extending from the second bias circuit.

A radio-frequency signal transmitting and receiving circuit includes a power amplifier, a transmission band pass filter configured to transmit a radio-frequency input signal, a first reception band pass filter configured to transmit a first radio-frequency reception signal, a first low-noise amplifier configured to amplify the first radio-frequency reception signal and output a first radio-frequency output signal, a first transmitting and receiving filter having a first end and a second end, the first end being electrically connected to a first antenna terminal, and a switch configured to electrically connect the transmission band pass filter to the second end of the first transmitting and receiving filter to output the radio-frequency input signal to the first antenna terminal and electrically connect the second end of the first transmitting and receiving filter to the first reception band pass filter to receive the first radio-frequency reception signal from the first antenna terminal.

Radio-frequency signal transmitting and receiving circuit

A semiconductor chip includes a compound semiconductor substrate having a pair of main surfaces and a side surface therebetween, a circuit on one main surface of the pair of main surfaces, and first metals on the main surface. The first metals are positioned, in plan view of the main surface, closer to an outer edge of the main surface than the circuit, substantially in a ring shape to surround the circuit with gaps between first metals adjacent to each other. The semiconductor chip further includes second metals on the main surface. The second metals are positioned, in plan view of the main surface, between the circuit and the first metals or closer to the outer edge than the first metals. Also, the second metals each are positioned, in plan view of the side surface, such that at least a part thereof overlaps a gap between the first metals.

Growing community of inventors

Kyoto, Japan

Yusuke Tanaka