Canon Kabushiki Kaisha

Yusuke Murai

Nobuaki Yamashita

Sou Hoshi

Hiroyuki Miyake

Hiroyuki Yamaguchi

Shoji Matsumoto

Tohru Ohsaka

Takashi Numagi

Kiyoshi Sekiguchi

First and second semiconductor devices and first and second bypass circuits are mounted on a printed wiring board. The first bypass circuit and the second bypass circuit are provided closer to the first semiconductor device and to the second semiconductor device, respectively. The first bypass circuit has one end connected to a power plane through a first power supply via and the other end connected to a ground plane through a first ground via. The second bypass circuit has one end connected to the power plane through a second power supply via and the other end connected to the ground plane through a second ground via. The ground plane has a slit between the connecting portions of the first and second ground vias to increase the impedance between the connecting portions of the first and the second ground vias. Thus, jitters caused by power supply noise can be reduced.

Printed circuit board

A printed wiring board includes conductive layers laminated with insulator layers interposed. A land group including a plurality of lands arranged with intervals between each other, is formed in a rectangular region on a surface layer, among the plurality of conductive layers, when viewed in a direction perpendicular to the surface layer. The land group is arrayed in a triangular lattice manner. The land group is arranged so that a smallest angle, among angles formed between one side of the rectangular region and respective three sides of the triangular lattice, is 7&#xb0; or more and 23&#xb0; or less.

Printed wiring board, semiconductor device and printed circuit board

A substrate of a semiconductor package comprises a conductor pattern which is formed in a surface layer, and is electrically connected to one terminal out of a power terminal and a ground terminal of a semiconductor element. The substrate also comprises in the surface layer a conductor pattern which is arranged while being separated from the conductor pattern, and a conductor pattern which is formed so as to have a wiring width thinner than that of the conductor pattern and connects the conductor pattern with the conductor pattern. The substrate also comprises a conductor pattern which is formed in an inner layer, faces the conductor pattern through a dielectric and is electrically connected to the other terminal out of the power terminal and the ground terminal of the semiconductor element.

Semiconductor package and printed circuit board

Provided is a printed circuit board capable of increasing an inductance value of a power pattern and a ground pattern while keeping a low electric resistance value of the power pattern and the ground pattern. The printed circuit board includes a printed wiring board including: a power layer having a power pattern formed therein; and a ground layer having a ground pattern formed therein. On the printed wiring board, an LSI as a semiconductor device and an LSI as a power supply member are mounted. The ground pattern has a first ground region that overlaps the power pattern as viewed from the direction perpendicular to the surface of the printed wiring board. In the first ground region, at least one defect portion is formed. In the first ground region, the defect portion forms a region that is narrower than the power pattern.

On a surface layer of a printed wiring board, main power supply patterns to be applied with different DC voltages are disposed in a second region. Power supply patterns are disposed on the surface layer, and the power supply patterns are led from the main power supply patterns to a first region. The power supply patterns connect power supply terminals of terminal groups in the second region. The power supply patterns connect the power supply terminals between the terminal groups in the first region. Power supply terminals of the terminal groups of a semiconductor package are electrically connected to the main power supply patterns by the power supply patterns. Thus, potential fluctuations are reduced and radiation noise is suppressed, and the number of layers of the printed wiring board is reduced.

Growing community of inventors

Kawasaki, Japan

Yusuke Murai