Semiconductor Energy Laboratory Co., Ltd.

Yusuke Koumura

Munehiro Kozuma

Minato Ito

Kengo Akimoto

Takanori Matsuzaki

Tatsuya Onuki

Yuki Okamoto

Koki Inoue

Fumiya Nagashima

Shunpei Yamazaki

Yoshiyuki Kurokawa

Hisao Ikeda

Hiromichi Godo

Hidetomo Kobayashi

Teppei Oguni

Yuji Iwaki

Kazuaki Ohshima

Seiko Inoue

Tatsunori Inoue

Naoaki Tsutsui

Tatsuya Okano

Ayana Kimotsuki

A novel electronic device is provided. The electronic device includes a display apparatus, an arithmetic portion, and a gaze detection portion, and the display apparatus includes a functional circuit and a display portion divided into a plurality of sub-display portions. The gaze detection portion has a function of detecting a user's gaze. The arithmetic portion has a function of dividing the plurality of sub-display portions between a first section and a second section using a detection result of the gaze detection portion. The first section includes a region overlapping with a user's gaze point. The functional circuit has a function of making a driving frequency of the second section lower than a driving frequency of the first section.

Electronic device

The circuit layout generation system includes a memory portion, a limitation data arithmetic portion, and a layout data arithmetic portion. The memory portion is configured to store circuit connection data and first limitation data. The circuit connection data is data regarding connection of a transistor and a capacitor included in a pixel circuit. The first limitation data includes data that determines a wiring interval of the transistor and a wiring interval of the capacitor and data that determines placement coordinates of the transistor and the capacitor. The limitation data arithmetic portion is configured to generate second limitation data on the basis of the circuit connection data and the first limitation data and store the second limitation data in the memory portion. The second limitation data is data that determines the placement of the transistor and the capacitor designated by the placement coordinates so that the transistor and the capacitor are positioned close to each other. The layout data arithmetic portion is configured to generate layout data on the basis of the circuit connection data, the first limitation data, and the second limitation data.

Circuit layout generation system

A position estimation system with low power consumption is provided. The position estimation system includes a comparison unit, a learning unit, a data acquisition unit, an inference unit, a data conversion unit, and an evaluation unit. The comparison unit has a function of calculating a first parallel movement amount and a first rotation amount on the basis of machine learning data representing geographic information. The learning unit has a function of generating a machine learning model through learning using the machine learning data, the first parallel movement amount, and the first rotation amount. The data acquisition unit has a function of acquiring acquisition data representing environmental information on the vicinity of a position estimation device. The inference unit has a function of inferring a second parallel movement amount and a second rotation amount, with use of the machine learning model, on the basis of the acquisition data and the machine learning data. The data conversion unit has a function of converting the machine learning data to evaluation data on the basis of the second parallel movement amount and the second rotation amount. The evaluation unit has a function of evaluating the degree of correspondence between the acquisition data and the evaluation data.

Position estimation system, position estimation device, and mobile object

A display apparatus with reduced power consumption is provided. The display apparatus includes a display portion including a first region and a second region, a first driver circuit corresponding to the first region, a second driver circuit corresponding to the second region, a first circuit, a second circuit, a first signal generation circuit, and a second signal generation circuit. The first circuit has a function of generating a first image signal corresponding to a first image, and the second circuit has a function of generating a second image signal corresponding to a second image. The second image contains character information. The first signal generation circuit has a function of generating a clock signal with a first frame frequency, and the second signal generation circuit has a function of generating a clock signal with a second frame frequency lower than the first frame frequency. The display apparatus displays the first image on the first region with the first frame frequency when the first image signal is transmitted to the first driver circuit, and displays the second image on the second region with the second frame frequency when the second image signal is transmitted to the second driver circuit.

Display apparatus and electronic device

A system with high processing speed and low power consumption is provided. The system includes an imaging device and an arithmetic circuit. The imaging device includes an imaging portion, a first memory portion, and an arithmetic portion, and the arithmetic circuit includes a second memory portion. The imaging portion has a function of converting light reflected by an external subject into image data, and the first memory portion has a function of storing the image data and a first filter for performing first convolutional processing in a first layer of a neural network. The arithmetic portion has a function of performing the first convolutional processing using the image data and the first filter to generate first data. The second memory portion has a function of storing the first data and a plurality of filters. The arithmetic circuit has a function of generating a depth map of the image data.

Imaging device utilizing a neural network

A display apparatus with a novel structure is provided. The display apparatus includes a first layer and a second layer positioned above the first layer. The first layer includes a driver circuit region, and the second layer includes a pixel array. The pixel array includes a plurality of pixel regions. The driver circuit region includes a control circuit unit and a plurality of local driver circuits. One of the plurality of local driver circuits corresponds to any one of the plurality of pixel regions. The local driver circuit has a function of outputting a driving signal for driving a plurality of pixels included in the corresponding pixel region. The control circuit unit has a function of comparing definition data of an input image signal and aspect ratio data of the pixel array to determine a first region where display is performed and a second region where display is not performed, and outputting, to the local driver circuit corresponding to the second region, a control signal for stopping output of the driving signal.

The driving assistance system includes an imaging device capable of capturing a first monochrome image in a vehicle traveling direction, a first neural network for segmentation processing, a second neural network for depth estimation processing, a determination portion determining a center of a portion cut off from the first monochrome image on the basis of the segmentation processing and the depth estimation processing, a third neural network for colorization processing of only a second cut-off monochrome image, and a display device for enlargement of the second monochrome image subjected to the colorization processing.

Imaging system, driving assistance system, and program

An audio device capable of inhibiting malfunction of an information terminal is provided. The audio device includes a sound sensor portion, a sound separation portion, a sound determination portion, and a processing portion. The sound sensor portion has a function of sensing sound. The sound separation portion has a function of separating the sound sensed by the sound sensor portion into a voice and sound other than a voice. The sound determination portion has a function of storing the feature quantity of the sound. The sound determination portion has a function of determining, with a machine learning model such as a neural network model, whether the feature quantity of the voice separated by the sound separation portion is the stored feature quantity. The processing portion has a function of analyzing an instruction contained in the voice and generating an instruction signal representing the content of the instruction in the case where the feature quantity of the voice is the stored feature quantity. The processing portion has a function of performing, on the sound other than a voice separated by the sound separation portion, processing for canceling the sound other than a voice. Specifically, the processing portion has a function of performing, on the sound other than a voice, processing for inverting the phase thereof.

Audio device with sound determination

A novel wiring layout design method is provided. A wiring layout in which a starting terminal group and an end terminal group are electrically connected to each other is generated using layout information and a netlist. In the case where the wiring layout satisfies a design rule, a wiring resistance and a parasitic capacitance of the wiring layout are extracted. The layout information is updated using Q learning and a new wiring layout is generated. In the Q learning, a positive reward is given when the values of the wiring resistance and the parasitic capacitance decrease, and a weight of the neural network is updated in accordance with the reward. In the case where the new wiring layout satisfies the design rule, a wiring resistance and a parasitic capacitance of the new wiring layout are extracted. In the case where the change rate of the wiring resistance and the parasitic capacitance is high, the layout information is updated using the Q learning.

Wiring layout design method, program, and recording medium

A system performs a layout design of a circuit for a small area satisfying a design rule within a short period of time. In a layout design system which includes a processing portion and in which a circuit diagram and layout design information are input to the processing portion, the processing portion has a function of generating layout data from the circuit diagram and the layout design information by performing a Q learning, the processing portion has a function of outputting the layout data, the processing portion includes a first neural network, and the first neural network estimates an action value function in the Q learning.

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Kanagawa, Japan

Yusuke Koumura