Nuvoton Technology Corporation Japan

Panasonic Corporation

Panasonic Intellectual Property Management Co., Ltd.

Yusuke Kanda

Katsuhiko Kawashima

Kenichi Miyajima

Akihiko Nishio

Seiji Nishiwaki

Manabu Yanagihara

Kazuo Momoo

Takeshi Harada

Yoshinori Takami

Takashi Yui

Hideyuki Okita

Jun-ichi Asada

Dai Motojima

Kenji Otani

Jun Shimizu

A semiconductor device includes a substrate, a back-barrier layer, a channel layer that has a band gap smaller than a band gap of the back-barrier layer, a first barrier layer that has a band gap larger than the band gap of the channel layer, a second barrier layer that is provided to fill a first recessed portion and has a band gap larger than the band gap of the channel layer, a source electrode, a drain electrode, and a gate electrode. An In composition ratio of the first barrier layer is greater than or equal to 0 and less than an In composition ratio of the second barrier layer. An Al composition ratio of the first barrier layer is greater than or equal to an Al composition ratio of the second barrier layer.

Semiconductor device

A semiconductor device includes: a Si substrate; a back electrode provided below the Si substrate; a SiC layer provided above the Si substrate; a nitride semiconductor layer provided above the SiC layer; a source electrode and a drain electrode provided above the nitride semiconductor layer; a gate electrode in contact with the nitride semiconductor layer; an intermediate layer provided in an opening that creates an opening in the SiC layer and the nitride semiconductor layer; a metal layer provided above the opening so as to cover the intermediate layer; and a conductor that is provided inside a through via that penetrates the intermediate layer and the Si substrate and is electrically connected with the back electrode and the metal layer. The intermediate layer is a metal nitride layer or a silicon oxide layer.

Semiconductor device and method for manufacturing semiconductor device

A power amplifier semiconductor device includes: a substrate; a semiconductor layer provided on the surface of the substrate and including a plurality of unit HEMTs; a connection layer provided on the semiconductor layer and including a source electrode, a drain electrode, and a gate electrode of each of the plurality of unit HEMTs; a terminal layer provided on the connection layer; a back electrode which is provided on the bottom surface of the substrate and whose potential is set to a source potential; and substrate vias that pass through the substrate and have a shield wiring layer on inner walls of the substrate vias. In plan view, either one of the drain aggregation portion or the gate aggregation portion is or both of the drain aggregation portion and the gate aggregation portion are each surrounded by the substrate vias.

Power amplifier semiconductor device

A semiconductor device includes: a gate electrode including a junction portion forming a Schottky junction with a barrier layer; a projecting portion including first and second gate field plates and projecting from the junction portion; and an insulating layer including first and second sidewalls. An angle formed between a highest position of a bottom surface of the first gate field plate and a main surface of a substrate, viewed from the first position, is a second elevation angle. An angle formed between an end on the drain electrode side of a lowest portion of a bottom surface of the second gate field plate and the main surface, viewed from the first position, is a third elevation angle. The second elevation angle is larger than the third elevation angle. The bottom surface of the second gate field plate includes an inclined surface where a distance from the barrier layer monotonically increases.

A semiconductor device for power amplification includes: a source electrode, a drain electrode, and a gate electrode disposed above a semiconductor stack structure including a first nitride semiconductor layer and a second nitride semiconductor layer; and a source field plate that is disposed above the semiconductor stack structure between the gate electrode and the drain electrode, and has a same potential as a potential of the source electrode. The source field plate has a staircase shape, and even when length LF2 of an upper section is increased for electric field relaxation, an increase in parasitic capacitance Cds generated between the source field plate and a 2DEG surface is inhibited.

Semiconductor device for power amplification

A semiconductor device includes: a first nitride semiconductor layer; a second nitride semiconductor layer; a source electrode and a drain electrode; and a gate electrode that is spaced apart from the source electrode and the drain electrode, and is in contact with the second nitride semiconductor layer. The gate electrode includes: a first barrier layer that includes TaN, has a layer thickness of Z1, and forms a Schottky junction with the second nitride semiconductor layer; a second barrier layer that is disposed above and in contact with the first barrier layer, includes TiN or WN, and has a layer thickness of Z2; and a wiring layer disposed above and in contact with the second barrier layer. In the semiconductor device, 200 nm≥Z1+Z2≥50 nm, Z1<Z2, and 50 nm>Z1>3 nm are satisfied.

A semiconductor device includes: a channel layer not containing Al; a barrier layer above the channel layer containing Al; a recess; and an ohmic electrode in the recess, which is in ohmic contact with a two-dimensional electron gas layer. An Al composition ratio distribution of the barrier layer has a maximum point at a first position. The semiconductor device includes: a first inclined surface of the barrier layer which includes the first position and is in contact with the ohmic electrode; and a second inclined surface of the barrier layer which intersects the first inclined surface on a lower side of the first inclined surface, and is in contact with the ohmic electrode. To the surface of the substrate, an angle of the second inclined surface is smaller than an angle of the first inclined surface. A position of the first intersection line is lower than the first position.

Semiconductor device and method of manufacturing semiconductor device

A semiconductor device includes a substrate; a first nitride semiconductor layer above the substrate; a second nitride semiconductor layer on the first nitride semiconductor layer; an ohmic electrode above the substrate; and a contact layer in contact with at least a part of the ohmic electrode, the contact layer containing silicon and chlorine. The second nitride semiconductor layer has a wider band gap than the first nitride semiconductor layer. A two-dimensional electron gas channel is formed in the first nitride semiconductor layer at a heterointerface between the first nitride semiconductor layer and the second nitride semiconductor layer. A silicon concentration has a higher peak value than a chlorine concentration in the contact layer.

Semiconductor device and method of manufacturing the device

It is intended to provide an optical disk apparatus which detects a light amount greater than zero even when used in conjunction with an optical disk substrate having a large birefringence, so that it is possible to properly read a signal without errors and properly perform optical disk controls. The optical disk apparatus includes: a light source for emitting light; an objective lens for converging the light onto a signal surface of an optical disk; a polarized beam diffraction element for diffracting the light reflected from the optical disk; a photodetector for detecting the light diffracted from the polarized beam diffraction element; and a wavelength plate disposed between the optical disk and the polarized beam diffraction element. The wavelength plate has a two-dimensional array of a plurality of birefringent regions including first and second regions, the first and second regions differing in birefringent phase difference and/or optic axes from each other, and the plurality of birefringent regions including the first and second regions cause the light to have different polarization states.

Growing community of inventors

Toyama, Japan

Yusuke Kanda