Sungkyunkwan University

Yuseok Song

Seokin Hong

Sang Hyo Kim

Jung Rae Kim

A semiconductor chip for correcting an aligned error comprises a memory array is provided. The semiconductor chip includes a transceiver circuit and an Error Correction Code (ECC) circuit. The ECC circuit is configured to receive target data to be encoded, encode the target data by multiplying a generator matrix of a previously generated ECC by the target data, store the encoded target data in the memory array, check a data transformed from the encoded target data, and generate an error corrected data by correcting only a single error of the transformed data and an adjacent error that does not exceed a first value boundary of a predetermined number of bits by using a parity check matrix of the ECC, and output the error corrected data.

Growing community of inventors

Suwon-si, South Korea

Yuseok Song