Microsoft Technology Licensing, LLC

Yuri Dotsenko

Amar Dinesh Patel

Max Alan McMullen

Mikhail Lyapunov

Matthew David Sandy

Andy Glaister

Jesse Natalie

Derek Sessions

Blaise Pascal Tine

Scott Chao-Chueh Lee

Blake Douglas Pelton

James George Cavalaris

Emily Nicole Wilson

Shen Wang

Jason Stewart Wohlgemuth

James Anthony Schwartz, Jr

Gaurav Jagtiani

Naga Govindaraju

Binit Ranjan Mishra

Minsang Kim

Steven Adrian West

Emma Sutherland Boyd

Cody D Hartwig

Aacer Hatem Daken

Peter Hanpeng Jiang

Emily Cara Clemens

Vijaybalaji Madhanagopal

Christina Marianne Curlette

Mukhtar Ahmed

Sri Harsha Kanukuntla

Drew Douglas Cross

Sharon Scarlet Tang

Jennifer Marie Bourlier

Terence Kwok Tak Chan

Raz Meir Aloni

In-place recovery of fatal system errors at virtualization hosts. A device identifies an occurrence of a fatal system error in the first instance of a host operating system (OS) executing in a computer system. The device determines to perform an in-place recovery for the fatal system error. The device performs the in-place recovery, including pausing the execution of a virtual machine (VM) by the first instance of the host OS, preserving a state of the VM within system memory of the computer system, and resuming the execution of the VM by a second instance of the host OS executing in the computer system based on the state of the VM that is preserved within the system memory of the computer system.

In-place recovery of fatal system errors at virtualization hosts

The application programming interface permits an application to specify resources to be used by shaders, executed by the GPU, through a data structure called the 'root arguments.' A root signature is a data structure in an application that defines the layout of the root arguments used by an application. The root arguments are a data structure resulting from the application populating locations in memory according to the root signature. The root arguments can include one or more constant values or other state information, and/or one or more pointers to memory locations which can contain descriptors, and/or one or more descriptor tables. Thus, the root arguments can support multiple levels of indirection through which a GPU can identify resources that are available for shaders to access.

Configuring resources used by a graphics processing unit

A resource used by a shader executed by a graphics processing unit is referenced using a 'descriptor'. Descriptors are grouped together in memory called a descriptor heap. Applications allocate and store descriptors in descriptor heaps. Applications also create one or more descriptor tables specifying a subrange of a descriptor heap. To bind resources to a shader, descriptors are first loaded into a descriptor heap. When the resources are to be used by a set of executing shaders, descriptor tables are defined on the GPU identifying ranges within the descriptor heap. Shaders, when executing, refer to the currently defined descriptor tables to access the resources made available to them. If the shader is to be executed again with different resources, and if those resources are already in memory and specified in the descriptor heap, then the descriptor tables are changed to specify different ranges of the descriptor heap.

Described are compiler algorithms that partition a compute shader program into maximal-size regions, called thread-loops. The algorithms may remove original barrier-based synchronization yet the thus-transformed shader program remains semantically equivalent to the original shader program (i.e., the transformed shader program is correct). Moreover, the transformed shader program is amenable to optimization via existing compiler technology, and can be executed efficiently by CPU thread(s). A Dispatch call can be load-balanced on a CPU by assigning single or multiple CPU threads to execute thread blocks. In addition, the number of concurrently executing thread blocks do not overload the CPU.

Rasterization of compute shaders

Described herein are optimizations of thread loop intermediate representation (IR) code. One embodiment involves an algorithm that, based on data-flow analysis, computes sets of temporary variables that are loaded at the beginning of a thread loop and stored upon exit from a thread loop. Another embodiment involves reducing the size of a thread loop trip for a commonly-found case where a piece of compute shader is executed by a single thread (or a compiler-analyzable range of threads). In yet another embodiment, compute shader thread indices are cached to avoid excessive divisions, further improving execution speed.

Scalar optimizations for shaders

Intermediate representation (IR) code is received as compiled from a shader in the form of shader language source code. The input IR code is first analyzed during an analysis pass, during which operations, scopes, parts of scopes, and if-statement scopes are annotated for predication, mask usage, and branch protection and predication. This analysis outputs vectorization information that is then used by various sets of vectorization transformation rules to vectorize the input IR code, thus producing vectorized output IR code.

Vectorization of shaders

Growing community of inventors

Kirkland, WA, United States of America

Yuri Dotsenko