Mellanox Technologies, Ltd.

Yuri Berk

Elad Mentovich

Vladimir Iakovlev

Tamir Sharkaz

Itshak Kalifa

Alexei Sirbu

Matan Galanty

Paraskevas Bakopoulos

Sylvie Rockman

Isabelle Cestier

Dimitrios Kalavrouziotis

Anders Larsson

Methods for forming an at least partially oxidized confinement layer of a semiconductor device and corresponding semiconductor devices are provided. The method comprises forming two or more layers of a semiconductor device on a substrate. The layers include an exposed layer and a to-be-oxidized layer. The to-be-oxidized layer is disposed between the substrate and the exposed layer. The method further comprises etching, using a masking process, a pattern of holes that extend through the exposed layer at least to a first surface of the to-be-oxidized layer. Each hole of the pattern of holes extends in a direction that is transverse to a level plane that is parallel to the first surface of the to-be-oxidized layer. The method further comprises oxidizing the to-be-oxidized layer through the pattern of holes by exposing the two or more layers of the semiconductor device to an oxidizing gas to form a confinement layer.

Fabricating semiconductor devices, such as VCSELs, with an oxide confinement layer

A vertical-cavity surface-emitting laser (VCSEL) is provided that includes a mesa structure disposed on a substrate. The mesa structure defines an emission axis of the VCSEL. The mesa structure includes a first reflector, a second reflector, and a cascaded active region structure disposed between the first reflector and the second reflector. The cascaded active region structure includes a plurality of cascaded active region layers disposed along the emission axis, where each of the cascade active region layers includes an active region having multi-quantum well and/or dots layers (MQLs), a tunnel junction aligned with the emission axis, and an oxide confinement layer. The oxide confinement layer is disposed between the tunnel junction and MQLs, and has an electrical current aperture defined therein. The mesa structure defines an optical window through which the VCSEL is configured to emit light.

Vertical-cavity surface-emitting laser (VCSEL) with cascaded active region

Various embodiments of improved PIN-type photodiodes are provided. In an example embodiment, the PIN-type photodiode includes a p-type contact; an n-type contact; a first absorbing layer disposed between the p-type contact and the n-type contact; and a second absorbing layer disposed between the first absorbing layer and the n-type contact. The first absorbing layer is characterized by a first absorption coefficient and the second absorbing layer is characterized by a second absorption coefficient. The second absorption coefficient is greater than the first absorption coefficient. In another example embodiment, the PIN-type photodiode includes a p-type contact; an n-type contact; a first absorbing layer disposed between the p-type contact and the n-type contact; and a non-absorbing accelerating layer disposed between absorbing layers and non-absorbing drift layer and the n-type contact.

High modulation speed PIN-type photodiode

Various embodiments provide methods for fabricating a couplable electro-optical device. An example method comprises fabricating a pillar on a substrate by forming a lens spacer portion about an electro-optical component fabricated on the substrate; and adhering unshaped lens material to an exposed surface of the pillar. The exposed surface of the pillar is disposed opposite the substrate. The example method further comprises maintaining the unshaped lens material at a reflow temperature for a reflow time to allow the lens material to reflow into a formed lens shape, and curing the lens material to form an integrated lens having the formed lens shape secured to the lens spacer portion and formed about the electro-optical component on the substrate.

Self-aligned integrated lens on pillar

VCSELs designed to emit light at a characteristic wavelength in a wavelength range of 910-2000 nm and formed on a silicon substrate are provided. Integrated VCSEL systems are also provided that include one or more VCSELs formed on a silicon substrate and one or more electrical, optical, and/or electro-optical components formed and/or mounted onto the silicon substrate. In an integrated VCSEL system, at least one of the one or more electrical, optical, and/or electro-optical components formed and/or mounted onto the silicon substrate is electrically or optically coupled to at least one of the one or more VSCELs on the silicon substrate. Methods for fabricating VCSELs on a silicon substrate and/or fabricating an integrated VCSEL system are also provided.

Long wavelength VCSEL and integrated VCSEL systems on silicon substrates

An optoelectronic device includes a substrate and first thin film layers disposed on the substrate and patterned to define a vertical-cavity surface-emitting laser (VCSEL), which is configured to emit optical radiation along an optical axis perpendicular to the substrate. Second thin film layers are disposed over the first thin film layers and are patterned to define an optical modulator in which the optical radiation propagates in a direction parallel to the substrate, and an optical coupler configured to couple the optical radiation from the VCSEL into the optical modulator.

Integration of modulator and laser in a single chip

A VCSEL includes an active region between a top distributed Bragg reflector (DBR) and a bottom DBR each having alternating GaAs and AlGaAs layers. The active region includes quantum wells (QW) confined between top and bottom GaAs-containing current-spreading layers (CSL), an aperture layer having an optical aperture and a tunnel junction layer above the QW. A GaAs intermediate layer configured to have an open top air gap is disposed over a boundary layer of the active region and the top DBR. The air gap is made wider than the optical aperture and has a height equal to one quarter of VCSEL's emission wavelength in air. The top DBR is attached to the intermediate layer by applying wafer bonding techniques. VCSEL output, the air gap, and the optical aperture are aligned on the same optical axis. The bottom DBR is epitaxially grown on a silicon or a GaAs substrate.

Vertical-cavity surface-emitting laser (VCSEL) device and method of making the same

Several VCSEL devices for long wavelength applications in wavelength range of 1200-1600 nm are described. These devices include an active region between a semiconductor DBR on a GaAs wafer and a dielectric DBR regrown on the active region. The active region includes multi-quantum layers (MQLs) confined between the active n-InP and p-InAlAs layers and a tunnel junction layer above the MQLs. The semiconductor DBR is fused to the bottom of the active region by a wafer bonding process. The design simplifies integrating the reflectors and the active region stack by having only one wafer bonding followed by regrowth of the other layers including the dielectric DBR. An air gap is fabricated either in an n-InP layer of the active region or in an air gap spacer layer on top of the semiconductor DBR. The air gap enhances optical confinement of the VCSEL. The air gap may also contain a grating.

Fabrication of low-cost long wavelength VCSEL with optical confinement control

Methods for fabricating vertical cavity surface emitting lasers (VCSELs) on a large wafer are provided. An un-patterned epi layer form is bonded onto a first reflector form. The first reflector form includes a first reflector layer and a wafer of a first substrate type. The un-patterned epi layer form includes a plurality of un-patterned layers on a wafer of a second substrate type. The first and second substrate types have different thermal expansion coefficients. A resulting bonded blank is substantially non-varying in a plane that is normal to an intended emission direction of the VCSEL. A first regrowth is performed to form first regrowth layers, some of which are patterned to form a tunnel junction pattern. A second regrowth is performed to form second regrowth layers. A second reflector form is bonded onto the second regrowth layers, wherein the second reflector form includes a second reflector layer.

Vertical-cavity surface-emitting laser fabrication on large wafer

A vertical cavity surface emitting laser (VCSEL) array is provided. Each tunable VCSEL includes an output coupling mirror; a high reflectivity mirror; an active cavity material structure disposed between the output coupling mirror and the high reflectivity mirror; and a spacer layer disposed between the output coupling mirror and the active cavity material. A tuning cavity is defined within the spacer layer. Each VCSEL further includes a first contact pad and a second contact pad designed to receive a driving voltage; a tuning electrode on a first surface of the output coupling mirror for tuning the emission wavelength to a distinct wavelength.

Tunable vertical-cavity surface-emitting laser

A vertical-cavity surface-emitting laser (VCSEL), substrate emitting VCSEL, and multi-beam emitting device and corresponding manufacturing processes are provided. An example VCSEL comprises a substrate having a first surface and a second surface; an output coupling mirror disposed on the second surface of the substrate; a high reflectivity mirror; and an active cavity material structure disposed between the output coupling mirror and the high reflectivity mirror. The active cavity material structure comprises a first current-spreading layer, a second current-spreading layer, an active region disposed between the first current-spreading layer and the second current-spreading layer, and a tunnel junction overgrown by the second current spreading layer, wherein the tunnel junction is disposed adjacent the active region. The VCSEL is configured to emit radiation outward through the first surface of the substrate.

Substrate emitting vertical-cavity surface-emitting laser

A vertical-cavity surface-emitting laser (VSCEL) and method for producing a VCSEL are described, the VCSEL including an undercut active region. The active region of the VCSEL is undercut relative to current-spreading layers of the VCSEL, such that a width of a tunnel junction of the VCSEL overgrown by a current spreading layer is less than a width of an active region of the VCSEL, and a width of the active region of the VCSEL is less than a width of the overgrown current-spreading layer, such that the VCSEL including the undercut active region is configured to transmit data at speeds greater than 25 gigabits/second.

Growing community of inventors

Kiryat Tivon, Israel

Yuri Berk