Huawei Technologies Co., Limited

Yunpeng Wang

Yuan Fang

Bingwu Ji

Tanfu Zhao

Yunming Zhou

Min Fan

Zhiyan Li

Guanjun Tang

A memory and a signal processing method are provided. The memory includes a latch circuit, a decoding circuit, a storage array, a read circuit, and a write circuit. The storage array includes M rows and N columns of bitcells. The latch circuit is configured to receive a first address and a second address. The decoding circuit is configured to: determine a first bitcell based on the first address, and determine a second bitcell based on the second address. The write circuit is configured to: receive data, and write the data into the first bitcell through a first port of the first bitcell. The read circuit is configured to read, through the first port of the first bitcell, data stored in the first bitcell; and is further configured to read, through a second port of the second bitcell, data stored in the second bitcell. Implementing this application can implement 1R1RW.

Memory including a 1R1RW bitcell storage array and methods thereof

A message publishing and subscribing method and apparatus, which relate to the information processing field and provide higher information transmission efficiency and better flexibility mainly by providing a corresponding dummy topic in a message broker for a publisher and a subscriber or by performing semantic recognition in the message broker for the publisher and the subscriber.

Message publishing and subscribing method and apparatus

Growing community of inventors

Xi'an, China

Yunpeng Wang