Samsung Electronics Co., Ltd.

Yonsei University

Yunhong Kim

Yunhwan Jung

Heesung Chae

Sunyool Kang

Kyung-Min Kim

Haesick Sul

Kyungmin Kim

Mooyoung Kim

Hyeokjong Lee

Hyeonji Lee

Seungmin Suh

Ingyeong Shin

Youngcheol Chae

Yongjun Cho

Takahiko Inada

Disclosed is a bandgap reference circuit, which includes a first current generator that generates a first current proportional to a temperature, a second current generator that outputs a second current obtained by mirroring the first current to a first node at which a reference voltage is formed, a first resistor that is connected with the first node and is supplied with the second current, and a first bipolar junction transistor (BJT) that includes an emitter node connected with the first resistor, a base node supplied with a first power, and a collector node supplied with a second power different from the first power.

Bandgap reference circuit using heterogeneous power and electronic device having the same

An image sensor including a row driver configured to provide, at a first time, a control signal to first pixels in a first group having n consecutive odd horizontal lines, provide, at a second time, the control signal to pixels in a second group having n consecutive even horizontal lines, and provide, at a third time, the control signal to pixels in a third group having n consecutive odd horizontal lines, and having a first horizontal line next to a last horizontal line of the first group, wherein each of the n horizontal lines of the first group is separated by an at least three-row interval from a corresponding one of the n horizontal lines of the second group, and a time interval between the first time point and the second time point is equal to a time interval between the second time point and the third time point.

Image sensor and method of operating the image sensor

Disclosed is an image sensor device which includes an image pixel that outputs a reset voltage and a first data voltage through a data line, and a voltage hold circuit that is connected with the data line, stores a first voltage based on the reset voltage, and provides the data line with a second voltage based on the first voltage.

Image sensor device and operation method thereof

An image sensor may include a pixel array a pixel array including an active pixel and an optical black pixel, the active pixel configured to generate a first pixel signal, and the optical black pixel configured to generate a second pixel signal, a first biasing circuit configured to bias the first pixel signal based on a first bias voltage, a first analog-to-digital converter configured to convert the biased first pixel signal into a first digital signal, a second biasing circuit configured to bias the second pixel signal based on a second bias voltage, and a second analog-to-digital converter configured to convert the biased second pixel signal into a second digital signal, the second digital signal configured to generate smaller random noise than the first analog-to-digital converter.

Image sensor including pixel array

An image sensor includes a pixel configured to operate in a high conversion gain (HCG) mode and a low conversion gain (LCG) mode during a readout period, and a correlated double sampling (CDS) circuit configured to generate a comparison signal based on a ramp signal and a pixel voltage received from the pixel, wherein the CDS circuit includes a comparator configured to: receive the pixel voltage through a first input node, receive the ramp signal through a second input node based on an LCG reset signal or an LCG image signal being received as the pixel voltage, and receive the ramp signal through a third input node based on an HCG reset signal or an HCG image signal being received as the pixel voltage; and compare the ramp signal to the pixel voltage, and output the comparison signal corresponding to a comparison result.

Image sensor with high conversion gain (HCG) mode and low conversion gain (LCG) mode

An image sensor for sampling a pixel signal a plurality of times during a readout time includes an analog comparator configured to compare a signal level of the pixel signal with a signal level of a target ramp signal that is any one of a plurality of ramp signals, a counter configured to output counting data based on a comparison result of the analog comparator, and a digital comparing circuit configured to compare a binary value of a target reference code corresponding to the target ramp signal with a binary value of the counting data and determine whether to output a digital signal corresponding to the counting data to a data output circuit based on a result of the comparison between the binary value of the counting data and the binary value of the target reference code.

Image sensor sampling pixel signal multiple times and an operating method of the image sensor

An image sensor includes a substrate including an active pixel region and an inactive pixel region, having a smaller area than the active pixel region; a plurality of active pixels in the active pixel region, each of the plurality of active pixels including a first transfer transistor, a first reset transistor, a first driving transistor, and a first selection transistor; and a plurality of inactive pixels in the inactive pixel region, each of the plurality of inactive pixels including a second transfer transistor, a second reset transistor, a second driving transistor, a second selection transistor, and a switch transistor connected to a node between the second driving transistor and the second select transistor. The plurality of switch transistors, included in the plurality of inactive pixels, are connected to each other by a connection wiring.

Image sensor

Bandgap reference circuit using heterogeneous power and electronic device having ihe same

A dynamic amplifier includes an amplifier configured to differentially amplify first and second input signals to generate first and second output signals, a bias circuit, and a variable impedance circuit. The bias circuit is connected between a first power node configured to supply a first source voltage and the amplifier, and configured to apply bias to the amplifier. The variable impedance circuit is connected between the amplifier and a second power node configured to supply a second source voltage that is lower than the first source voltage. The variable impedance circuit is configured to adjust amplification gain of the amplifier, by adjusting impedance based on a magnitude of one among the first and second input signals and the first and second output signals.

Dynamic amplifier

An analog to digital converting circuit includes a correlated double sampling circuit (CDS) that compares a pixel signal with a ramp signal, and outputs a comparison signal, a timing amplifier that increases an active time of the comparison signal 'N' times, and outputs an extended signal, wherein the 'N' is a positive integer, and a counter that outputs a digital signal corresponding to the pixel signal in response to the extended signal and a first clock signal.

Growing community of inventors

Hwaseong-si, South Korea

Yunhong Kim