Industrial Technology Research Institute

Yung-Yuan Ho

Nang-Ping Tu

Jian-Yau Yih

Chia-Yuan Chang

Chien-Cheng Tu

Shaw-Jia Hor

Jung-Dar Ho

A method of testing a reflection-type LCD projector is disclosed. The present invention provides a method of testing the digital-circuit portion of the data drivers of the silicon wafer LCD of the reflection-type LCD projector, and a method of testing the panel pixel area of the silicon wafer LCD display. The present invention can be applied to LCD display panels manufactured by CMOS process and polysilicon thin film transistor process for the benefits of helping to resolve manufacturing issues during the development stage, thereby shortening the required production time schedule, and reducing the production cost.

Method for testing reflection LCD projector and display panel pixel area thereof

The present invention discloses a digital-to-analog converter (DAC) with noise equalized and a device capable of equalizing noise in SRAM. In the DAC, when the BLANK signal is high, a transient current still flows to ground for equalizing noise. The device capable of equalizing noise in SRAM comprises a dummy read/write memory cell for adding read/write operations and a auto-detection circuit for detecting when to add read/write operations.

Noise equalized DAC and device capable of equalizing noise in SRAM

Noise-equalized DAC and device capable of equalizing noise in SRAM

A single-port SRAM with no read/write collisions. The present invention uses some X-axis and Y-axis control circuits to reduce the amounts of lines used in the structure of the present invention, but still maintains circuitry stability.

Single-port SRAM with no read/write collisions

The continuing need for faster and denser SRAM memories places a constant increased demand on the power consumption of the memory devices. Much of the power consumption occurs during the pre-charge phase where it is common practice to bring up all pre-charge circuits at once and hold them active until the memory operations are complete. This invention describes a design where each pre-charge circuit connected to a group of memory cells through bit lines is activated at a separate time from the other pre-charge circuits. Thus each pre-charge circuit is active only during the time that useful work is being done with that portion of the memory. This reduces power consumption by not powering on circuits and precharging bit lines before they are actually needed.

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Hsinchu, Taiwan

Yung-Yuan Ho