United Microelectronics Corp.

Yung-Teng Tsai

Chung-Chih Hung

Chia-Chen Sun

Sheng-Chieh Chen

Hung-Chin Lin

Chih-Yu Wu

Jun-Ming Chen

Shih-Cheng Chen

Kuan-Chun Lin

Chi-Hung Chan

Chih-Chieh Chou

A semiconductor structure includes a wafer comprising a plurality of viewing fields defined thereon, a plurality of dies defined by a scribe line formed in each viewing field, a plurality of mark patterns formed in the scribe line, and a plurality of anchor pattern respectively formed in the review fields, the anchor patterns being different from the mark patterns.

Method for reviewing defects

Semiconductor structure and method for reviewing defects

A test structure for electron beam inspection and a method for defect determination using electron beam inspection are provided. The test structure for electron beam inspection includes a semiconductor substrate, at least two conductive regions disposed on the semiconductor substrate, a connection structure disposed on the two conductive regions, and a cap dielectric layer disposed on the connection structure. The method for defect determination using the electron beam inspection includes the following steps. An electron beam inspection is preformed to a test structure with an instant detector and a lock-in amplifier. Signals received by the detector within a period of time are amplified by the lock-in amplifier. A defect in the test structure is determined by monitoring the signals received by the detector and amplified by the lock-in amplifier. The inspection accuracy is improved by the test structure and the method for defect determination in the present invention.

Test structure for electron beam inspection and method for defect determination using electron beam inspection

Growing community of inventors

Tainan, Taiwan

Yung-Teng Tsai