Taiwan Semiconductor Manufacturing Comp. Ltd.

Yung-Lung Hsu

Kuo-Cheng Lee

Yun-Wei Cheng

Chun-Hao Chou

Tsung-Han Tsai

Hsin-Chi Chen

Volume Chien

Chiu-Jung Chen

Chia-Yu Wei

Horng-Huei Tseng

Yen-Liang Lin

Kun-Tsang Chuang

Chin-Hsun Hsiao

Chao-Hsiung Wang

Tzu-Hsuan Hsu

Chih-Hsun Lin

Chia-Yi Tseng

Chiang-Ming Chuang

Yi-Hsing Chu

Hsin-Chieh Huang

Keng-Ying Liao

Po-Zen Chen

Chung-Bin Tseng

Yen-Hsung Ho

Kun-Huei Lin

Horng Huei Tseng

Ruey-Hsin Liu

Ching-Chun Wang

Shun-Liang Hsu

Chih-Ming Lee

Bo-Tsung Tsai

Jun-Lin Tsai

Kuan-Wei Su

Yen-Ming Chen

Shiu-Ko JangJian

Feng-Chi Hung

Chi-Cherng Jeng

Po-Wei Liu

Shih-Chi Lin

Yean-Kuen Fang

Fu-Tsun Tsai

Cheng-Yuan Li

James Cheng-Ming Wu

Mei-Yen Li

Su-Hua Chang

Ssu-Chiang Weng

Yu-Hsuan Cheng

Po-Chun Chiu

Juin-Jie Chang

Ruey-Hsin Liou

Chen Hsin-Chi

Huan-En Lin

To-Yu Chen

Kun-tsang Chuang

Yu-Shih Lin

Ching-Ling Cheng

Chen Chiu-Jung

Yin-Chen Chen

Mao-Hsiung Kuo

A method includes following steps. An image of a wafer is captured. A first contact region in the captured image at which the first conductive contact is rendered is identified. A second contact region in the captured image at which the second conductive contact is rendered is identified. The second conductive contact is determined as not shorted to the first conductive contact, in response to the identified second contact region in the captured image is darker than the identified first contact region in the captured image.

Method of testing wafer

A back side illumination (BSI) image sensor with a dielectric grid opening having a planar lower surface is provided. A pixel sensor is arranged within a semiconductor substrate. A metallic grid is arranged over the pixel sensor and defines a sidewall of a metallic grid opening. A dielectric grid is arranged over the metallic grid and defines a sidewall of the dielectric grid opening. A capping layer is arranged over the metallic grid, and defines the planar lower surface of the dielectric grid opening.

Stacked grid design for improved optical performance and isolation

A semiconductor device includes a semiconductor substrate, a radiation-sensing region, at least one isolation structure, and a doped passivation layer. The radiation-sensing region is present in the semiconductor substrate. The isolation structure is present in the semiconductor substrate and adjacent to the radiation-sensing region. The doped passivation layer at least partially surrounds the isolation structure in a substantially conformal manner.

Semiconductor device with a radiation sensing region and method for forming the same

A semiconductor image sensor includes a substrate having a first side and a second side that is opposite the first side. An interconnect structure is disposed over the first side of the substrate. A plurality of radiation-sensing regions is located in the substrate. The radiation-sensing regions are configured to sense radiation that enters the substrate from the second side. A plurality of isolation structures are each disposed between two respective radiation-sensing regions. The isolation structures protrude out of the second side of the substrate.

Back side illuminated image sensor with deep trench isolation structures and self-aligned color filters

A method includes capturing an image of a wafer, the wafer comprising a first conductive contact over an active region of the wafer and a second conductive contact over a shallow trench isolation (STI) region abutting the active region; identifying a brightness of a first contact region in the captured image at which the first conductive contact is rendered; identifying a brightness of a second contact region in the captured image at which the second conductive contact is rendered; and in response to the identified brightness of the first contact region in the captured image being substantially the same as the identified brightness of the second contact region in the captured image, determining that the second conductive contact is shorted to the first conductive contact.

Disclosed is a method of fabricating a semiconductor image sensor device. The method includes providing a substrate having a pixel region, a periphery region, and a bonding pad region. The substrate further has a first side and a second side opposite the first side. The pixel region contains radiation-sensing regions. The method further includes forming a bonding pad in the bonding pad region; and forming light-blocking structures over the second side of the substrate, at least in the pixel region, after the bonding pad has been formed.

Semiconductor image sensor device having back side illuminated image sensors with embedded color filters

A method for forming a high dielectric constant (high-&#x3ba;) dielectric layer on a substrate including performing a pre-clean process on a surface of the substrate. A chloride precursor is introduced on the surface. An oxidant is introduced to the surface to form the high-&#x3ba; dielectric layer on the substrate. A chlorine concentration of the high-&#x3ba; dielectric layer is lower than about 8 atoms/cm.

High dielectric constant dielectric layer forming method, image sensor device, and manufacturing method thereof

A semiconductor structure includes an ILD disposed over a semiconductive substrate, an isolation disposed between the semiconductive substrate and the ILD, and a conductive pad disposed within the semiconductive substrate, the isolation and the ILD. A top surface of the conductive pad is substantially parallel with two surfaces of the semiconductive substrate. The top surface of the conductive pad is between the two surfaces of the semiconductive substrate. Sidewalls of the conductive pad are in direct contact with the ILD and the isolation.

Semiconductor structure

Some embodiments relate to a device array including a plurality of devices arranged in a semiconductor substrate. A protection ring circumscribes an outer perimeter of the device array. The protection ring includes a first ring neighboring the device array, a second ring circumscribing the first ring and meeting the first ring at a first p-n junction, and a third ring circumscribing the second ring and meeting the second ring at a second p-n junction. The first ring has a first width, the second ring has a second width, and the third ring has a third width. At least two of the first width, the second width, and the third width are different from one another.

Protection ring for image sensors

A method of fabricating a semiconductor structure includes forming first and second features in a scribe region of a semiconductor substrate in which the first feature has a first electrical resistance, the second feature has a second electrical resistance, and the first electrical resistance is different form the second electrical resistance; forming an interlayer dielectric layer over the first and second features; and forming a first contact in the interlayer dielectric layer and connected to the first feature and a second contact in the interlayer dielectric layer and connected to the second feature.

Semiconductor structure, testing and fabricating methods thereof

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Tainan, Taiwan

Yung-Lung Hsu