United Microelectronics Corp.

Yung-Lung Chen

Chiao-Yen Tai

Chein-Wei Jen

Hwan-Rei Lee

Digital filter bank device that operates in a frequency-time hierarchically arranged, recursively fed back scheme based on the concept of decimation of a multi-speed-rate-operated system. The digital filter bank device operates in accordance with the computational requirement of summation of products for generating a filter output signal, and the computations are performed according to a software scheme based on a distributed arithmetic algorithm. The use of minimum hardware is enabled by a time-multiplexed scheme for both the implementation of the decimation and the distributed arithmetic principles of signal processing. The use of such a digital filter bank device results in a digital filter hardware architecture that has a significantly reduced semiconductor device die surface area.

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Taichung, Taiwan

Yung-Lung Chen