Apple Inc.

Cisco Technology, Inc.

Realtek Semiconductor Inc.

Yung-Chin Chen

Jim Chen Chou

Shereef Shehata

Assaf Menachem

D Amnon Silverstein

Peter F Holland

David R Pope

Sheng Zhang

Aleksandr M Movshovich

Guy Côté

Michael Bekerman

Abhijit V Warkhedi

Chaohao Wang

Hopil Bae

Sorin Constantin Cismas

Mahdi Farrokh Baroughi

Enkhamgalan Dorjgotov

Ming Zhang

I-Ming Pao

Yun Gong

Giovanni Carbone

Jian Zhou

Ido Y Soffair

Young Don Bae

Ketan Arun Padwekar

Lingtao Wang

Daniel Yu-Kwong Ng

Uri Nix

Yanghyo Kim

An electronic device uses a leader synchronize signal generator to synchronize clock signal generators used by multiple components in the electronic device to a common time-base. A processor core complex of the electronic device sends per-frame configuration to a timing controller for frames to be displayed on an electronic display before a corresponding frame begins.

Two-way communication to allow consistent per-frame configuration update

In one embodiment, a system includes a first device rendering image data, a second device storing the image data, and a display panel that displays the image data stored in the memory. The first device renders multiple frames of the image data, compresses the multiple frames into a single superframe, and transports the single superframe. The second device receives the single superframe, decompresses the single superframe into the multiple frames of image data, and stores the image data on a memory of the second device.

Transmission and consumption of multiple image subframes via superframe

A device may include a display for displaying an image frame based on warped image data and image processing circuitry to generate the warped image data by warping input image data to account for one or more distortions associated with displaying the image. The image processing circuitry may include a two-stage cache architecture having an first cache and an second cache and warp the input image data by generating mapping data indicative of a warp between the input image space and the output image space and fetching the input image data to populate the first cache. Warping may also include populating the second cache with a grouping of pixel values from the first cache that are selected according to a sliding window that traverses the first cache based on the mapping data and interpolating between pixel values of the grouping to generate pixel values of the warped image data.

Cache architecture for image warp processing systems and methods

A device may include a display that display an image frame that is divided into adjustable regions having respective resolutions based on compensated image data. The device may also include image processing circuitry to generate the compensated image data by applying gains that compensate for burn-in related aging of pixels of the display. The gains are based on an aggregation of history updates indicative of estimated amounts of aging associated with pixel utilization. The circuitry may generate a history update by obtaining boundary data indicative of the boundaries between the adjustable regions, determining an estimated amount of aging, and dynamically resampling the estimated amount of aging by resampling a portion of the estimated amount of aging corresponding to an adjustable region by a factor and resampling of a different portion of the estimated amount of aging corresponding to another adjustable region by a different factor based on the boundary data.

Foveated display burn-in statistics and burn-in compensation systems and methods

A compensation system includes a processor configured to determine compensated data for display on a sub-pixel of the display device. The processor may receive image data configured to be displayed on the sub-pixel, convert the gray level data to first voltage data; fetch, from a memory, compressed 1×1 sub-pixel uniformity compensation data for the sub-pixel, and decompress the compressed 1×1 sub-pixel uniformity compensation data via a decompressor. The decompressed data comprises the 1×1 sub-pixel uniformity compensation data for the sub-pixel. The processor may also determine a voltage compensation offset value associated with the sub-pixel based on the second voltage data, generate compensated voltage data based in part on the voltage compensation offset value and the first voltage data, convert the compensated voltage data to compensated gray level data; and transmit the compensated gray level data to pixel driving circuitry associated with the sub-pixel.

Compensation schemes for 1x1 sub-pixel uniformity compensation

A method may include receiving, via a processor, a frame of image data, such that the frame of image data may include an active portion and an idle portion. The active portion may include data for presenting one or more images via a first display of a first electronic device. The method may also include receiving a signal from a second electronic device during the idle portion of the frame of image data, such that the second electronic device is separate from the first display. The method may then involve initiating processing of the frame of image data in response to the signal being received from the second electronic device.

Follower mode video operation

The disclosure is regarding an apparatus and a method for frame rate conversion. The frame rate conversion apparatus, for receiving at least two input frames to generate at lease one output frame, comprises a motion estimation module for generating a candidate list comprising regional motion vectors and temporal motion vectors from the at least two input frames and choosing a winner motion vector from the candidate list, a motion compensation module for generating the at lease one output frame according to the winner motion vector, a frame feature extraction module for generating fade-in/out information or a logo detection information from the at least two input frames, and an adaptive MEMC control module for deciding a weighting of the winner motion vector according to the fade-in/out information or the logo detection information.

Apparatus and method for frame rate conversion

An apparatus and method for implementing comprehensive QOS independent of the fabric system is disclosed. According to one embodiment, a system is provided comprising a switching medium, a plurality of line cards, a first scheduler associated with an ingress line card, and a second scheduler associated with an egress line card and communicatively coupled with the first scheduler. According to another embodiment, a line card is provided comprising a plurality of input buffers, a plurality of output buffers, output buffer status logic coupled to the output buffers operable to produce output buffer status information corresponding to each output buffer, a first scheduler coupled to the input buffers and operable to select data from the input buffers based upon the output buffer status, and a second scheduler coupled to the output buffers and operable to select data from the output buffers in accordance with Quality of Service requirements.

Apparatus and method for implementing comprehensive QoS independent of the fabric system

A method and apparatus wherein only a partial key is stored in a hashing table is disclosed. By storing a partial key as opposed to storing the entire original key, less data is required to be stored in the hash table. This reduces the attendant memory costs. The reduction in memory requirement does not degrade the hash functionalities whatsoever. Hashing conflicts can be fully resolved by consulting the partial key.

Partial key hashing memory

Methods and devices for controlling traffic in a multi-level system are described. A first counter associated with a first node in a first level of the system is incremented. A second counter associated with a second node in an upstream level of the system is incremented. The first counter is incremented more frequently than the second counter.

Multiple update frequencies for counters in a multi-level shaping system

Growing community of inventors

Saratoga, CA, United States of America

Yung-Chin Chen