Novatek Microelectronics Corp.

Taiwan Semiconductor Manufacturing Comp. Ltd.

Wistron Neweb Corporation

Wiston Neweb Corporation

Yung-Cheng Lin

Xiaomeng Chen

Shih-Chang Wang

Pei-Chao Su

Kuang-Shing Chen

Chien-Huei Chen

Hung-Yi Chung

Wei-Chen Wu

Li-Jou Lee

Chien-An Lin

Chan-Ming Chang

Shih-Yung Chen

Ren-Hong Luo

Mu-Jung Chen

Shih-Chun Lin

Chia-Hung Lin

Po-Yu Tseng

Tsung-Hau Chang

Kuo-Feng Huang

Ching-Ho Hung

Jr-Ching Lin

Che-Yi Lin

Chien-Ming Peng

Chen-Chao Chang

A hot spot defect detecting method and a hot spot defect detecting system are provided. In the method, hot spots are extracted from a design of a semiconductor product to define a hot spot map comprising hot spot groups, wherein local patterns in a same context of the design yielding a same image content are defined as a same hot spot group. During runtime, defect images obtained by an inspection tool performing hot scans on a wafer manufactured with the design are acquired and the hot spot map is aligned to each defect image to locate the hot spot groups. The hot spot defects in each defect image are detected by dynamically mapping the hot spot groups located in each defect image to a plurality of threshold regions and respectively performing automatic thresholding on pixel values of the hot spots of each hot spot group in the corresponding threshold region.

Hot spot defect detecting method and hot spot defect detecting system

An eye width monitor (EWM) for a clock and data recovery (CDR) circuit includes a delay circuit, a first multiplexer (MUX) and a calibration circuit. The delay circuit includes an input terminal and an output terminal. The first MUX, coupled to the delay circuit, includes a first input terminal, a second input terminal and an output terminal. The first input terminal of the first MUX is coupled to a clock input terminal of the EWM. The second input terminal of the first MUX is coupled to the output terminal of the delay circuit. The output terminal of the first MUX is coupled to the input terminal of the delay circuit. The calibration circuit, coupled to the delay circuit, is configured to receive an oscillation clock from the delay circuit and receive a reference clock, and calibrate the oscillation clock with the reference clock.

Eye width monitor and related method of detecting eye width

A voltage regulator and method applied thereto are provided. The voltage regulator generates a regulated voltage in response to a reference voltage and a control code. The voltage regulator includes a voltage divider circuit, an amplifier circuit, and a power MOS array. The voltage divider circuit is configured to divide the regulated voltage to generate a feedback voltage. The amplifier circuit is configured to amplify a voltage difference between the reference voltage and the feedback voltage to generate a bias voltage. The power MOS array includes multiple transistors. Each transistor has a first terminal coupled to a power rail, a second terminal coupled to the regulated voltage, and a control terminal selectively coupled to either the power rail or the bias voltage in response to the control code.

Voltage regulator and method applied thereto

The data serialization circuit includes a delay circuit, a data serializer, a first data sampler and a second data sampler. The delay circuit receives an input clock signal and generates a plurality of delayed clock signals. The delayed clock signals includes a first delayed clock signal generated by a first delay stage and a second delayed clock signal generated by a second delay stage. The data serializer receives parallel data and a final stage delayed clock signal of the delayed clock signals, and converts the parallel data into serial data according to the final stage delayed clock signal. Wherein, the first data sampler samples the serial data according to the first delayed clock signal to generate a first output serial data, and the second data sampler samples the first output serial data according to the second delayed clock signal to generate a second output serial data.

Data serialization circuit

A wireless transceiver includes at least one antenna, a substrate, and a mechanical part on which the at least one antenna is disposed, wherein a relative position between the at least one antenna and the substrate is changed when an external force is applied to the mechanical part.

Wireless transceiver

The present invention provides an electronic device including a coupler, a noise-estimation apparatus and an assembly unit. The coupler receives a baseband signal. The noise-estimation apparatus receives the baseband signal and subtracts a predetermined synchronization preamble from the baseband signal to obtain a noise-estimation signal, and the predetermined synchronization preamble is a transmission signal that conforms to the standards of 802.11bg and/or IEEE 802.11n. The assembly unit receives the baseband signal and subtracts a noise-estimation signal from the baseband signal to obtain an output signal.

Electronic device and noise-cancellation method

A network managing method is utilized for a wireless network system. The wireless network includes multiple wireless access equipments and multiple user equipments. The method uses the wireless access equipments to measure a plurality of echo back time of the user equipments to obtain multiple measurement results, determines locations of the user equipments according to the measurement results and locations of the wireless access equipments, and adjusts wireless operations from the wireless access equipments to the user equipments according to the locations and priorities of the user equipments.

Network managing method and device for wireless network system

A digital signage system, includes: a gateway device, coupled to a network; at least one first hot spot, including: an adaptor box, coupled to the gateway device, downloading a content transmitted through the network via the gateway device; a first access point device, coupled to the gateway device, downloading a service on the network via the gateway device; and a display device, coupled to the adaptor box, displaying the content through the adaptor box, and at least one second hot spot, including: a second access point device, coupled to the gateway device, downloading the service via the gateway device, wherein the first access point device and the second access point device provide the service to at least one mobile terminal through wireless communication.

Digital signage system

A differential amplifier includes a pair of input transistors, a pair of load transistors, a pair of impedance devices, a pair of auxiliary input transistors, and a pair of shield transistors is provided. The input transistors provide two input terminals. The load transistors provide two output terminals and two first terminals connected to first voltage. The impedance devices are coupled between the output terminals in series. The auxiliary input transistors have two control terminals respectively connected to the input terminals, two first terminals, and two second terminals. The input transistors and the auxiliary input transistors have reverse conductive type. The shield transistors has a pair of control terminals, a pair of first terminals respectively connected to the second terminals of the auxiliary input transistors and coupled to a second voltage through a pair of current sources, and a pair of second terminals respectively connected to the output terminals.

Differential amplifier

A spread-spectrum circuit including an inverter, a current source, a control unit and a shaping circuit is provided. An input terminal of the inverter receives an original clock signal. The current source is coupled to a current transmission terminal of the inverter. The control unit includes a control circuit, and changes the current magnitude of the current source according to the original clock signal to control the charging/discharging speed of an output terminal of the inverter, so that the output terminal outputs a voltage signal. The shaping circuit shapes the voltage signal into a spread-spectrum clock signal.

Spread spectrum circuit

A rail-to-rail operational amplifier capable of reducing current consumption includes an amplification stage circuit including a first compensation output terminal and a second compensation output terminal, for generating an amplified signal according to an input signal, an output stage circuit coupled to the amplification stage circuit, for outputting the amplified signal, and a compensation circuit coupled to the amplification stage circuit and the output stage circuit. The compensation circuit includes a first voltage generator for generating a first voltage, a second voltage generator for generating a second voltage, a first compensation capacitor, a second compensation capacitor, and four switches named from a first switch to a fourth switch, wherein the first voltage is approximately a steady state voltage of the first compensation output terminal and the second voltage is approximately a steady state voltage of the second compensation output terminal.

Growing community of inventors

Hsinchu, Taiwan

Yung-Cheng Lin