Taiwan Semiconductor Manufacturing Comp. Ltd.

Yung-Chen Lu

Syun-Ming Jang Jang

Lih-Ping Li

Zhen-Cheng Wu

Keng-Chu Lin

Chung-Chi Ko

Lain-Jong Li

Hui-Lin Chang

I-i Chen

Syun-Ming Jeng

A method for seasoning a process chamber is disclosed. The seasoning method includes providing a seasoning film on the interior surfaces of a process chamber, typically after cleaning of the chamber.

Post-cleaning chamber seasoning method

The present disclosure provides a method, integrated circuit, and interconnect structure utilizing non-metal barrier copper damascene integration. The method is provided for fabricating an interconnect for connecting to one or more front end of line (FEOL) devices. The method includes forming a layer of doped oxide on the one or more FEOL devices and forming a first barrier layer on the layer of doped oxide, the first barrier layer comprising such material as silicon oxycarbide (SiOC) or silicon carbonitride (SiCN). The method further includes forming a plurality of refractory metal plugs in the first barrier layer and the doped oxide layer, forming a low dielectric constant film over the first barrier layer and the plurality of refractory metal plugs, and performing a first etch to create trenches through the low dielectric constant film. The plurality of refractory metal plugs and the first barrier layer perform as an etch-stop.

Method of a non-metal barrier copper damascene integration

A method for plasma treating an exposed copper surface and dielectric insulating layer in a semiconductor device manufacturing process including providing a semiconductor wafer having a process surface including an exposed copper portion and an exposed dielectric insulating layer portion; plasma treating in a first plasma treatment process, the process surface with a first plasma including ammonia (NH) and nitrogen (N) plasma to form a copper nitride layer overlying the exposed copper portion; and, plasma treating in a second plasma treatment process the process surface with a second plasma including oxygen (O).

Multi-step plasma treatment method to improve CU interconnect electrical performance

A method for forming at least one barrierless, embedded metal structure comprising the following steps. A structure having a patterned dielectric layer formed thereover with at least one opening exposing at least one respective portion of the structure. Respective metal structures are formed within each respective opening. The first dielectric layer is removed to expose the top and at least a portion of the side walls of the respective at least one metal structure. A dielectric barrier layer is formed over the structure and the exposed top of the respective metal structure. A second, conformal dielectric layer is formed over the dielectric barrier layer to complete the respective barrierless at least one metal structure embedded within the second, conformal dielectric layer. The dielectric barrier layer preventing diffusion of the metal comprising the respective at least one metal structure into the second, conformal dielectric layer.

Method of fabricating barrierless and embedded copper damascene interconnects

A method of increasing the cracking threshold of a low-k material layer comprising the following steps. A substrate having a low-k material layer formed thereover is provided. The low-k material layer having a cracking threshold. The low-k material layer is plasma treated to increase the low-k material layer cracking threshold. The plasma treatment including a gas that is CO, He, NHor combinations thereof.

Method to increase cracking threshold for low-k materials

The present disclosure provides a method for forming an intermediate trench layer through low k dielectric material deposition in a damascene process for manufacturing semiconductor devices. After depositing a low k dielectric material block, a curing process is applied to the low k dielectric material block for a predetermined curing time period, wherein after the curing time period, the low k dielectric material block forms a first and second low k dielectric layers so as to make the first low k dielectric layer an intermediate trench layer, thereby eliminating the need of an etch stop layer.

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Taipei, Taiwan

Yung-Chen Lu