Taiwan Semiconductor Manufacturing Comp. Ltd.

Other

Yun-Wei Cheng

Kuo-Cheng Lee

Chun-Hao Chou

Yung-Lung Hsu

Hsin-Chi Chen

Feng-Chien Hsieh

Volume Chien

Tsung-Han Tsai

Hsun-Ying Huang

Chi-Cherng Jeng

Ying-Hao Chen

Yin-Chieh Huang

Cheng-Ming Wu

Chiu-Jung Chen

Wei-Li Hu

Shiu-Ko JangJian

Chun-Wei Chia

Zhe-Ju Liu

Horng-Huei Tseng

Chao-Hsiung Wang

Yi-Hsing Chu

Kun-Huei Lin

Chih-Mu Huang

Cheng-Yuan Li

I-i Cheng

Tzu-Hsuan Hsu

Yen-Liang Lin

Hsin-Chieh Huang

Shih-Hsun Hsu

Wan-Chen Huang

Horng Huei Tseng

Chia Chun-Wei

Bo-Tsung Tsai

Chuan-Pu Liu

Mu-Han Cheng

Chen Hsin-Chi

Yi-Sheng Liu

Ting-Hao Chang

Chien Ming Sung

Ya Chun Teng

Cheng Yuan Wang

ChunHao Lin

Chia-Yen Hsu

Chun-Hao Lin

Feng-Chi Hung

Ching-Chun Wang

Sheng-Chau Chen

Sheng-Chan Li

Chia-Yu Wei

Chien Nan Tu

Chao-Ching Chang

Ping-Hao Lin

Che-Min Lin

Chih-Lung Cheng

Tsung-Wei Huang

Yen-Chang Chen

Wen-Jen Tsai

Ping Kuan Chang

Chen Chiu-Jung

I-l Cheng

Chao Chih-Kang

Yu-Hsun Chih

Cheng Han Lin

Bo-Ge Huang

An image sensor device may include a pixel sensor array and a black level correction (BLC) region. The BLC region may include a sensing region in a substrate and a light-blocking layer above the sensing region. An anti-reflection array may be formed in the light-blocking layer. The anti-reflection array includes holes, trenches, and/or other structural features such that the light-blocking layer includes two or more areas in which the top surface of the light-blocking layer is at different heights in the image sensor device. The different heights of the top surface of the light-blocking layer reduce the likelihood of light being reflected off of the light-blocking layer and toward the pixel sensor array. The anti-reflection array may reduce the likelihood of occurrence of flares or hot spots in images generated by the image sensor device, which may increase the image quality of the images generated by the image sensor device.

Image sensor device and methods of formation

A method of manufacturing a semiconductor wafer is disclosed. The method includes exposing the semiconductor wafer to one or more dopant species to form one or more first implant layers on the semiconductor wafer, testing one or more geometric parameter values of the formed one or more first implant layers, after testing the one or more geometric parameter values, conditionally exposing the semiconductor wafer to one or more dopant species to form one or more additional implant layers on the semiconductor wafer, after forming the one or more additional implant layers, conditionally forming one or more additional circuit layers on the semiconductor wafer to form a plurality of functional electronic circuits on the semiconductor wafer, and conditionally testing the semiconductor wafer with a wafer acceptance test (WAT) operation.

Mid-manufacturing semiconductor wafer layer testing

The present disclosure provides a semiconductor structure and a method of manufacturing the same. The semiconductor structure includes a sensing device, a solar cell, and an interconnecting structure. The solar cell is disposed above the sensing device and is electrically connected to the sensing device. The interconnecting structure is disposed between the sensing device and the solar cell and has a first surface facing the solar cell and a second surface facing the sensing devices. The interconnecting structure comprises a first energy storage component and a second energy storage component. The first energy storage component is disposed closer to the first surface of the interconnecting structure than the second energy storage component.

Semiconductor structure and method of manufacturing the same

An image sensor device includes a semiconductor substrate having a first side, and a trench isolation structure dividing the substrate into sensing units. Each sensing unit includes a first gate electrode and a second gate electrode disposed on the first side, and a first pixel and a second pixel extending into the substrate and disposed between the first and second gate electrodes from a top view perspective. The first pixel is disposed under the second pixel and electrically connected to the first gate electrode, and the second pixel is electrically connected to the second gate electrode. A method of manufacturing a semiconductor structure includes forming a trench isolation in a semiconductor substrate; forming a first pixel in the substrate; forming a second pixel in the substrate over the first pixel; forming a first gate structure over the substrate; and forming a second gate structure over the second pixel.

A pixel sensor includes a transfer fin field effect transistor (finFET) to transfer a photocurrent from a photodiode to a drain region. The transfer finFET includes at least a portion of the photodiode, an extension region associated with the drain region, a plurality of channel fins, and a transfer gate at least partially surrounding the channel fins to control the operation of the transfer finFET. In the transfer finFET, the transfer gate is wrapped around (e.g., at least three sides) of each of the channel fins, which provides a greater surface area over which the transfer gate is enabled to control the transfer of electrons. The greater surface area results in greater control over operation of the finFET, which may reduce switching times of the pixel sensor (which enables faster pixel sensor performance) and may reduce leakage current of the pixel sensor relative to a planar transfer transistor.

Method for manufacturing image sensor including forming FinFET transfer gate having a plurality of channel fins above a p-type region

A pixel array includes a plurality of dark pixel sensors configured to generate dark current calibration information for a plurality of visible light pixel sensors included in the pixel array. The plurality of dark pixel sensors may generate respective dark current measurements for each of the plurality of visible light pixel sensors or for small subsets of the plurality of visible light pixel sensors. In this way, each of the plurality of visible light pixel sensors may be individually calibrated (or small subsets of the plurality of visible light pixel sensors may be individually calibrated) based on an estimated dark current experienced by each of the plurality of visible light pixel sensors. This may enable more accurate dark current calibration of the visible light pixel sensors included in the pixel array, and may be used to account for large differences in estimated dark currents for the visible light pixel sensors.

Pixel array including dark pixel sensors

A semiconductor arrangement includes a photodiode extending to a first depth from a first side in a substrate. An isolation structure laterally surrounds the photodiode and includes a first well that extends into a first side of the substrate. A deep trench isolation extends into a second side of the substrate and at least a portion of the deep trench isolation underlies the first well.

Semiconductor arrangement with isolation structure

The present disclosure describes heat dissipation structures formed in functional or non-functional areas of a three-dimensional chip structure. These heat dissipation structures are configured to route the heat generated within the three-dimensional chip structure to designated areas on or outside the three-dimensional chip structure. For example, the three-dimensional chip structure can include a plurality of chips vertically stacked on a substrate, a first passivation layer interposed between a first chip and a second chip of the plurality of chips, and a heat dissipation layer embedded in the first passivation layer and configured to allow conductive structures to pass through.

Heat dissipation structures

A near infrared sensing device includes a near infrared light sensor configured to detect infrared light at least at a design-basis infrared wavelength, and a surface plasmon polariton structure including at least an embedded grating that is embedded in a light-receiving surface of the near infrared light sensor. The surface plasmon polariton structure is configured to couple with light at the design-basis infrared wavelength to form a surface plasmon polariton at the light-receiving surface of the near infrared light sensor. The surface plasmon polariton structure may further include a metal grating disposed on the light-receiving surface of the near infrared light sensor and aligned with the embedded grating. The embedded grating may comprise an embedded metal grating that is embedded in the light-receiving surface of the near infrared light sensor, or trenches formed in the light-receiving surface of the near infrared light sensor and at least partially filled with air.

Near infrared light sensor with improved light coupling and CMOS image sensor including same

The present disclosure provides an integrated circuit (IC) structure with a solar cell and an image sensor array. An integrated structure according to the present disclosure includes a first substrate including a plurality of photodiodes, an interconnect structure disposed on the first substrate, a first bonding layer disposed on the interconnect structure, a second bonding layer disposed on the first bonding layer, a second substrate disposed on the second bonding layer, and a transparent conductive oxide layer disposed on the second substrate.

Integration of solar cell and image sensor

A pixel array may include a group of time-of-flight (ToF) sensors. The pixel array may include an image sensor comprising a group of pixel sensors. The image sensor may be arranged among the group of ToF sensors such that the image sensor is adjacent to each ToF sensor in the group of ToF sensors.

Pixel array including time-of-flight sensors

An image sensor device is disclosed which includes a semiconductor layer having a first surface and a second surface, where the second surface is opposite to the first surface. The device includes a conductive structure disposed over the first surface, with a dielectric layer disposed between the conductive structure and the first surface. The device includes a first dielectric layer disposed over the second surface of the semiconductor substrate. The device includes a second dielectric layer disposed over the first dielectric layer. The device includes a color filter layer disposed over the second dielectric layer. In some embodiments, the thickness, refractive index, or both of the first dielectric layer and the thickness, refractive index, or both of the second dielectric layer may be collectively determined to cause incident radiation passing through the first dielectric layer and the second dielectric layer and to the plurality of pixels to have destructive interference.

Back side illuminated image sensor device with select dielectric layers on the backside and methods of forming the same

A method includes forming image sensors in a semiconductor substrate, thinning the semiconductor substrate from a backside of the semiconductor substrate, forming a dielectric layer on the backside of the semiconductor substrate, and forming a polymer grid on the backside of the semiconductor substrate. The polymer grid has a first refractivity value. The method further includes forming color filters in the polymer grid, wherein the color filters has a second refractivity value higher than the first refractivity value, and forming micro-lenses on the color filters.

Low-refractivity grid structure and method forming same

An image sensor device includes a substrate, photosensitive pixels, an interconnect structure, a dielectric layer, and a light blocking element. The photosensitive pixels are in the substrate. The interconnect structure is over a first side of the substrate. The dielectric layer is over a second side of the substrate opposite the first side of the substrate. The light blocking element has a first portion extending over a top surface of the dielectric layer and a second portion extending in the dielectric layer. The second portion of the light blocking element laterally surrounds the photosensitive pixels.

Image sensor device

An image sensor device is provided. The image sensor device includes a substrate having a front surface, a back surface, and a light-sensing region. The image sensor device includes a first isolation structure extending from the front surface into the substrate. The first isolation structure surrounds a first portion of the light-sensing region, the first isolation structure has an etch stop layer, the etch stop layer has an end portion, and the end portion has an H-like shape. The image sensor device includes a second isolation structure extending into the substrate from the back surface to the end portion. The second isolation structure surrounds a second portion of the light-sensing region.

Growing community of inventors

Taipei, Taiwan

Yun-Wei Cheng