Samsung Electro-mechanics Co., Ltd.

Samsung Electronics Co., Ltd.

Samsung Display Co., Ltd.

Yun Tae Lee

Han Bit Kim

Hyung Joon Kim

Ho Kwon Yoon

Moon Il Kim

Young Sik Hur

Sung Han Kim

Jong Woong Chang

Sang Hyun Cha

Young Kwan Lee

Jung Ho Shim

Je Hyeon Yu

Jae Yong Park

Su-Young Lee

Dae Kwon Jung

Je Suk Lee

Bang Chul Ko

Jun-Woo Park

Joon Seo Yim

Dong Ho Shin

Jun Jin Kong

Chang Wook Lee

Tae Hoon Kim

Young Bok Yoon

Nam Ki Park

Tae Chan Kim

Jin Won Lee

Hoon Do Heo

Won Wook So

Jung Chak Ahn

Soo Hyun Moon

Jung Hyun Cho

Chan Woo Park

Dong Yeon Shin

Bum Suk Kim

Deuk Hee Park

Young Hee Lee

Sung Chung Park

Shin Young Cheong

Dong Ku Kang

Je Hyun Bang

Hong Joo Lee

Kyung Moon Jung

Joon Seok Chae

Jae Chan Lee

Eun Jung Jo

Tae Sub Jung

Jung Sun Kwon

Ick Chan Shim

Yong Woon Park

Jong Tae Hwang

Sung Youl Choi

Jung Hoon Jung

Si Hoon Hong

Jae Woong Hyun

Tae Kon Koo

Byung Gi Ahn

Hye Jin Lee

A semiconductor package includes: a semiconductor chip including a front end of line (FEOL) layer and a first back end of line (BEOL) layer disposed on the FEOL layer; and a printed circuit board including a wiring layer and a second BEOL layer disposed on the wiring layer, wherein the semiconductor chip is mounted on the printed circuit board so that the first and second BEOL layers are connected to each other while facing each other, and the second BEOL layer includes a wiring for power transmission.

Semiconductor chip and semiconductor package including the same

A camera for a vehicle includes: an imaging unit configured to image an exterior of the vehicle; and a controller configured to enlarge a region of interest of the imaging unit in response to a driving speed of the vehicle being higher than a reference speed, and reduce the region of interest of the imaging unit in response to the driving speed being lower than the reference speed.

Camera for vehicle

The present disclosure relates to a semiconductor package including a first semiconductor chip having a first surface on which first connection pads are disposed, and a second surface on which second connection pads are disposed, and including through-vias connected to the second connection pads; a connection structure disposed on the first surface and including a first redistribution layer; a first redistribution disposed on the second surface; and a second semiconductor chip disposed on the connection structure. The first connection pads are connected to a signal pattern of the first redistribution layer, and the second connection pads are connected to at least one of a power pattern and a ground pattern of the second redistribution layer.

Semiconductor package including plurality of semiconductor chips on common connection structure

A bridge embedded interposer and a package substrate and a semiconductor package including the same includes: a connection structure including one or more redistribution layers, a first bridge disposed on the connection structure and including one or more first circuit layers electrically connected to the one or more redistribution layers, a frame disposed around the first bridge on the connection structure and including one or more wiring layers electrically connected to the one or more redistribution layers, and an encapsulant disposed on the connection structure and covering at least a portion of each of the first bridge and the frame.

Bridge embedded interposer, and package substrate and semiconductor package comprising the same

A semiconductor package includes: a first semiconductor package including: a first frame having a first through portion, a first semiconductor chip in the first through portion and having a first surface on which a first connection pad is disposed and a second surface on which a second connection pad is disposed, and a through via connected to the second connection pad, a first connection structure on the first surface and including a first redistribution layer, and a backside redistribution layer on the second surface; and a second semiconductor package on the first semiconductor package and including: a second connection structure including a second redistribution layer, a second frame on the second connection structure and having a second through portion, and a second semiconductor chip in a second through portion and having a third surface on which a third connection pad is disposed.

Semiconductor package

A terminal may include: a sensor unit including a microphone configured to acquire a surrounding sound, and a position sensor configured to identify a position of the terminal; a processor configured to learn the position of the terminal and the surrounding sound to identify characteristics of a dangerous sound depending on the position of the terminal, and determine a setting value of a hearing aid depending on the identified characteristics of the dangerous sound; and a communicator configured to transmit the setting value to the hearing aid.

Terminal with hearing aid setting, and method of setting hearing aid

An actuator includes a magnet, a driving coil facing the magnet, a driver, and a position calculation processor. The driver is configured to move the magnet in at least one of an optical axis direction and a direction perpendicular to the optical axis by applying a driving signal to the driving coil. The position calculation processor includes sensing coils, and is configured to calculate a position of the magnet according to inductance levels of an inductor of the sensing coils. The inductance levels vary according to movements of the magnet.

Camera module actuator

A multilayer ceramic electronic component and a mounting board thereof include a reinforcing member that is disposed on upper and lower surfaces of a ceramic body of the multilayer ceramic electronic component and that is bonded to the first and the second external electrodes. The reinforcing member provides reduced occurrence of cracking and reduced stress applied to the component. The reinforcing member may have a coefficient of thermal expansion (CTE) that is within a range of 1 to 4 times a coefficient of thermal expansion of a dielectric layer of the ceramic body, and/or may have a modulus that is 0.5 or more times a modulus of the dielectric layer.

Multi-layered ceramic electronic component and mounting board thereof

A terminal may include: a sensor unit including a microphone configured to acquire a surrounding sound and a position sensor configured to detect a position of the terminal; a processor configured to identify characteristics of a voice of a specific person designated by a user of the terminal through learning, and determine a setting value determining operating characteristics of a hearing aid based on the characteristics of the voice of the specific person; and a communicator configured to transmit the setting value to the hearing aid.

Terminal with hearing aid setting, and setting method for hearing aid

A semiconductor package includes a frame having a recess on which a stopper layer is disposed, a semiconductor chip including a body having a first surface on which a connection pad is disposed and a second surface opposing the first surface, and a through-via penetrating through at least a portion of a region between the first surface and the second surface, the second surface facing the stopper layer, an encapsulant covering at least a portion of each of the frame and the semiconductor chip and filling at least a portion of the recess, a first connection structure disposed on a lower side of the frame and on the first surface of the semiconductor chip and including a first redistribution layer, and a second connection structure disposed on an upper side of the frame and on the second surface of the semiconductor chip and including a second redistribution layer.

A package-on-package includes a first semiconductor package including a first semiconductor chip and a second semiconductor package, disposed on the first semiconductor package, including a second semiconductor chip electrically connected to the first semiconductor chip. Each of the first and second semiconductor chips includes one or more units. The number of units of the first semiconductor chip is greater than the number of units of the second semiconductor chip. The one or more units of the first semiconductor chip and the one or more units of the second semiconductor chip implement a function of an application processor chip.

Package on package and package connection system comprising the same

A connection system of semiconductor packages includes: a printed circuit board; a first semiconductor package disposed on a first surface of the printed circuit board and connected to the printed circuit board through first electrical connection structures; a second semiconductor package disposed on a second surface of the printed circuit board and connected to the printed circuit board through second electrical connection structures; and a third semiconductor package disposed on the first 10 semiconductor package and connected to the first semiconductor package through third electrical connection structures. The first semiconductor package includes an application processor (AP), the second semiconductor package includes a memory, and the third semiconductor package includes a power management integrated 15 circuit (PMIC).

Connection system of semiconductor packages using a printed circuit board

A semiconductor package includes a first connection structure having a first surface and a second surface and including one or more first redistribution layers, a first semiconductor chip disposed on the first surface, a second semiconductor chip disposed on the second surface, a third semiconductor chip disposed on the second surface, and at least one first passive component disposed between the second and third semiconductor chips on the second surface. The first connection structure may include a first region including a region overlapping the first passive component, and a second region including regions respectively overlapping at least portions of the second and third semiconductor chips, when viewed from above. The first region may be disposed between second regions. The first redistribution may include at least one of a power pattern and a ground pattern in the first region and include a signal pattern in the second region.

An electronic component package includes: a frame, including a through-hole and a through-wiring; an electronic component disposed in the through-hole of the frame; a metal plate disposed on a first side of the electronic component and the frame; and a redistribution layer disposed on a second side of the electronic component opposing the first side and electrically connected to the electronic component.

Electronic component package

Growing community of inventors

Suwon-si, South Korea

Yun Tae Lee