Samsung Electronics Co., Ltd.

Yun-seong Eo

Heung-bae Lee

Kwang-du Lee

Hee-Mun Bang

Sung-jae Jung

Ick-jin Kwon

Joon-Hee Lee

Seong-soo Lee

Hoon-Tae Kim

Sang-yoon Jeon

Kwy-ro Lee

Heung-Bae Lee

Kyu-don Choi

Gea-Ok Cho

Seong-sik Song

Il-ku Nam

A radio frequency identification (RFID) reader is provided, having a transmitting circuit that generates a transmitted signal to operate an RFID tag, a receiving circuit that receives a received signal including a tag signal from the RFID tag and a transmission carrier leakage signal leaking from the transmitting circuit, and a leakage removing circuit that senses a phase and amplitude of the transmission carrier leakage signal inputted to the receiving circuit, converts the transmitted signal from the transmitting circuit into a signal having a phase opposite to that of the transmission carrier leakage signal and an amplitude equal to that of the transmission carrier leakage signal, and synthesizes the converted signal and the received signal inputted to the receiving circuit.

RFID reader and method for removing a transmission carrier leakage signal

An inductor circuit includes a pair of inductors connected in parallel with each other and a switch for turning on and off electric power to one of the pair of inductors. The inductance of the inductor circuit can be varied and the quality factor Q can be improved. Further, RF circuits employing the inductor circuit can generate an intended operating frequency.

Parallel-structured switched variable inductor circuit

Provided is a mixer including: an amplifier amplifying an input signal using at least one amplifier element; a mixing unit mixing the input signal amplified by the amplifier with a local oscillator signal output from a local oscillator. The mixing unit includes at least one pair of switching elements switching the amplifier, and the switching elements are MOSFETs having gates and body nodes to which a same local oscillator signal is applied. Thus, a time required for turning on the switching elements can be reduced, and 1/f noise is also reduced. Also, an overdrive voltage can be increased with respect to local oscillator signals having an identical intensity. Thus, a relatively low voltage operation can be performed.

Mixer

An integrated circuit having integrated inductors includes at least one pair of transistors, and at least one inductor group which includes a pair of inductors coupled to the at least one pair of the transistor, respectively. The pair of the inductors form a spiral shape on a plane and the inductors arranged symmetrically to each other. Magnetic fluxes, which are generated by current flows along the inductors of the at least one inductor group, are formed in a direction to mutually intensify the magnetic fluxes according to differential signals applied to the at least one transistors from outside. Accordingly, high inductance and high quality factor can be attained owing to the positive magnetic coupling of the inductors.

Integrated circuit having integrated inductors

A buffer amplifier, which includes a first differential signal amplifier including first and second NMOSFETs (N-type metal-oxide semiconductor field-effect transistors) amplifying differential input signals; a second differential signal amplifier including first and second PMOSFETs (P-type metal-oxide semiconductor field-effect transistors) amplifying the differential input signals; a first feedback resistor including an end commonly connected to drains of the first NMOSFET and the first PMOSFET and the other end commonly connected to gates of the first NMOSFET and the first PMOSFET; a second feedback resistor including an end commonly connected to drains of the second NMOSFET and the second PMOSFET and the other end commonly connected to gates of the second NMOSFET and the second PMOSFET; and a current source providing a bias current for driving the first and second differential signal amplifiers, is provided.

Buffer amplifier

A transmitter having a vertical BJT, capable of reducing power consumption, carrier leakage of a local oscillator and an error vector magnitude (EVM), is disclosed. In the transmitter, vertical BJTs implemented by a standard triplex well CMOS process are used in a frequency up-mixer and a baseband analog circuit including a DAC, an LPF, a VGA and a PGA, thereby improving the overall performance of the transmitter.

Transmitter using vertical BJT

A dual gate cascade amplifier includes a first transistor and a second transistor electrically connected in series, the second transistor including a first parallel transistor and a second parallel transistor, the first parallel transistor and the second parallel transistor being electrically connected in parallel, a first channel electrically connecting a first end channel region of the first transistor and a second end channel region, wherein one of the first or second end channel regions is a source and the other of the first or second end channel regions is a drain, the second end channel region being a common end channel region shared by the first and second parallel transistors, and a second channel electrically connected to the second end channel region and extending away from the first transistor.

Dual gate cascade amplifier

Disclosed herein is an integratable power amplifier having a variable bias voltage, in which a first bias controller detects the amplitude of an RF signal and outputs a DC signal varying with the detected amplitude based on the non-linearity of a rectification transistor. A second bias controller generates a bias voltage that optimizes amplification efficiency by adjusting the voltage of the DC signal received from the first bias controller through a source follower transistor being a complementary device. An amplifier transistor is activated by a driving voltage, amplifies the input signal according to the bias voltage received from the second bias controller, and outputs the amplified signal.

Growing community of inventors

Suwon-si, South Korea

Yun-seong Eo