Samsung Electronics Co., Ltd.

Yun Ju Kwon

Sang Woo Kim

Joon-Woo Cho

Joon Woo Cho

Woo-Jin Kim

Dong Min Kim

Byung Tak Lee

Jung Uk Woo

Yoo Seok Shon

In Tae Kang

In Yup Kang

A semiconductor device and a method of testing the same are provided. A semiconductor device includes a Design Under Test (DUT), a processing core configured to execute test software to determine an optimum operating voltage of the DUT, and a protection circuit configured to block the transmission of undefined signals generated by the DUT while the processing core executes the test software.

Semiconductor device and method of testing the same

A bus system is provided. A bus system includes a slave functional block and a master functional block. The master functional block transmits a first command to the slave functional block. The slave functional block includes a first bus protector. The first bus protector receives the first command on behalf of the slave functional block and transmits a dummy signal corresponding to the first command to the master functional block in response to the slave functional block being in a state of not being able to receive the first command or not being able to transmit a response signal corresponding to the first command.

Bus system

Provided are a semiconductor device and a semiconductor system. A semiconductor device includes a hardware auto clock gating (HWACG) logic configured to provide clock gating of an intellectual property (IP) block; and a memory power controller configured to perform power gating of a memory electrically connected with the IP block, based on the HWACG logic providing the clock gating for the IP block. The HWACG logic includes a first clock source configured to provide a first clock signal; a second clock source configured to receive the first clock signal provided by the first clock source, and provide a second clock signal to the IP block; a first clock control circuit configured to control the first clock source; and a second clock control circuit configured to transmit a clock request to the first clock control circuit, and control the second clock source, based on an operation state of the IP block.

Semiconductor device and semiconductor system

A method and an apparatus for supporting a self-destruction function in a baseband modem are provided. Aspects of the present disclosure are to address at least the above-mentioned problems and/or disadvantages and to provide at least the advantages described below. Accordingly, an aspect of the present disclosure is to provide a self-destruction method and apparatus in which a self-impossible state is autonomously entered if the baseband modem of a receiving terminal which supports mobile communication is necessary. Another aspect of the present disclosure is to provide a method and apparatus for deleting information stored in memory when a command is received over a mobile communication network in which a baseband modem has been constructed and then entering a self-impossible state so that the terminal is not recovered although it is booted up again.

Method and apparatus for supporting self-destruction function in baseband modem

The present invention provides a modulo operation method. The modulo operation method, in a case where the square of a divisor N is greater than or equal to a dividend C, includes: determining the number of computation stages n satisfying 2&#x3c;N&#x2266;2; performing an initialization operation by initializing a constant a to the smallest integer greater than or equal to half of N; performing a first operation by subtracting, when C is greater than or equal to N&#xb7;a (product of N and a), the value of C by the value of N&#xb7;a; and performing a second operation by assigning the smallest integer greater than or equal to half of a to the value of a, wherein the value of C is output as the result of modulo operation after the first operation and the second operation are repeated n times. In the first operation, when C is less than N&#xb7;a, the value of C is unchanged. In the modulo operation method and apparatus of the present invention, the amount of computation in a modulo operation or division operation does not increase in linear proportion to the magnitude of the divisor N but increases in proportion to log N. As a result, the total amount of computation decreases and computation speed increases.

Growing community of inventors

Yongin-si, South Korea

Yun Ju Kwon