Skhynix Inc.

Yun-Je Choi

Do-Hyung Kim

Seung-Bum Kim

Dae-Sik Park

Se-Han Kwon

Chang-Youn Hwang

Hong-Gu Yi

Noh-Jung Kwak

Ki-Soo Choi

Doo-Sung Jung

Jung-Taik Cheong

Hae-Jung Park

Tae-Woo Jung

Disclosed are a semiconductor device capable of reducing parasitic capacitance between adjacent conductive structures and a method for fabricating the same. The semiconductor device includes a plurality of bit line structures each comprising a first contact plug formed over a substrate and a bit line formed over the first contact plug. A spacer structure having air gaps is formed on sidewalls of the first contact plug and on sidewalls of the bit line. An plug isolation layer is formed between the plurality of bit line structures. The isolation layer includes an opening. A second contact plug is formed in the opening and a memory element is formed over the second contact plug.

Semiconductor device including air gaps and method for fabricating the same

A semiconductor device may include: a substrate having first and second surfaces; an interlayer dielectric layer having a first opening to expose the first surface; a first plug positioned in the first opening and isolated from a sidewall of the first opening by a pair of gaps; a bit line extended in any one direction while covering the first plug; a second plug including a lower part adjacent to the first plug and an upper part adjacent to the bit line, and connected to the second surface; a first air gap positioned between the first plug and the lower part of the second plug; and a second air gap positioned between the bit line and the upper part of the second plug, and having a larger width than the first air gap.

Semiconductor device with air gap and method for fabricating the same

Growing community of inventors

Gyeonggi-do, South Korea

Yun-Je Choi