Hynix Semiconductor Inc.

Yun Hyuck Ji

Seung Woo Jin

Dong Suk Shin

Su Ho Kim

Sang Woon Park

Disclosed is a method for forming an isolation layer of a semiconductor device. The method includes the steps of providing a semiconductor substrate having a predetermined isolation region, sequentially forming a pad oxide layer and a pad nitride layer exposing the predetermined isolation region on the semiconductor substrate, forming a trench through etching the semiconductor substrate by a predetermined thickness using the pad nitride layer as a mask, forming a wall oxide layer at a side wall of the trench, sequentially forming a nitride layer and an oxide layer on a trench structure including the wall oxide layer, forming an AlOlayer on an entire surface of a resultant structure, planarizing the AlOlayer through polishing the AlOlayer, and forming the isolation layer by removing the pad nitride layer.

Method for forming isolation layer of semiconductor device

In a silicon substrate having a contact hole in a device region, the contact resistance between the contact plug and the silicon substrate is reduced by preventing formation of an undesirable layer therebetween by treating the exposed surface of the substrate before forming the contact plug. Further, a two-layered contact plug consisting of a first contact plug layer having high impurity concentration and a second contact plug layer having low impurity concentration, on the interlayer insulating film including the exposed surface of the substrate. The interface between the silicon substrate and the contact plug is thermally treated at low temperature, and the first contact plug layer having high impurity concentration and the second contact plug layer having low impurity concentration, are formed, so that the resistance between the silicon substrate and the contact plug can be reduced, thereby increasing the operation speed of the device. thereby increasing the operation speed of the device.

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Kyoungki-do, South Korea

Yun Hyuck Ji