Samsung Electronics Co., Ltd.

Yun-Hyeok Im

Kyol Park

Tae-Je Cho

Jae-Wook Yoo

Kyoung-Min Lee

Myung-Kyoon Yim

Kyung-Soo Lee

Un-Byoung Kang

Wook Hwan Kim

Joong-Hyun Baek

Ho-Jeong Moon

Dong-Kil Shin

Jong-Yeon Kim

Donghan Kim

Jung-Hwan Kim

Tae-Hong Min

Won-keun Kim

Kwang-Chul Choi

Sang-uk Kim

Young-Hoon Ro

Hee-jung Hwang

Hyon-chol Kim

Ji-hwan Hwang

Chung-sun Lee

Eun-kyoung Choi

To dynamically manage a temperature of an electronic device, a local temperature is provided by measuring a temperature of a local spot in the electronic device and a reference temperature is provided by measuring a temperature of a reference spot in the electronic device where the reference spot and the local spot are thermally coupled. A target temperature corresponding to a limit value of the reference temperature is adjusted based on the local temperature and a power level of the electronic device is controlled based on the same target temperature. The target temperature may be set to a relatively high value to secure performance of the electronic device when the local temperature is relatively low. Alternatively, the target temperature may be set to a relatively low value to pursue stability of the electronic device when the local temperature is relatively high.

Method of dynamic thermal management of electronic device

A controller configured to: acquire a temperature of a first component and a temperature of a second component; and adjust a thermal resistance of a medium between the first component and the second component based on the acquired temperature of the first component, the acquired temperature of the second component, a first temperature limit of the first component, and a second temperature limit of the second component.

Controllers, apparatuses, and methods for thermal management using adaptive thermal resistance and thermal capacity

A semiconductor package and an electronic system including the same include a package board having an electric circuit pattern. A semiconductor chip is mounted on the package board and electrically connected with the circuit pattern of the package board. A non-contact temperature detector is provided with the semiconductor package and detects a temperature of an external heat source without making contact with the external heat source. A temperature controller controls the semiconductor chip according to the temperature of the external heat source that is detected by the non-contact temperature detector.

Semiconductor package and electronic system including the same

A method of predicting a temperature includes operatively coupling a temperature prediction circuit to a device including a semiconductor chip, determining a correlation between a current and voltage of the temperature prediction circuit, and predicting a temperature with respect to power applied to the device using the determined correlation.

System and method for predicting the temperature of a device

A semiconductor package includes a circuit board having an inner circuit pattern and a plurality of contact pads connected to the inner circuit pattern, at least one integrated circuit (IC) device on the circuit board and making contact with the contact pads, a mold on the circuit board, the mold fixing the IC device to the circuit board, and a surface profile modifier on a surface of the IC device and a surface of the mold, and the surface profile modifier enlarging a surface area of the IC device and the mold to dissipate heat.

Method of manufacturing a semiconductor package including a surface profile modifier

Provided are a bump structure includes a first bump and a second bump, a semiconductor package including the same, and a method of manufacturing the same. The bump structure includes: first bump provided on a connection pad of a substrate, the first bump including a plurality of nano-wires extending from the connection pad and a body connecting end portions of the plurality of nano-wires; and a second bump provided on the body of the first bump.

Bump structure including nano-wires and a body connecting ends of the nano-wires, semiconductor package having the bump structure and method of manufacturing the semiconductor package

Semiconductor package

A stack package usable in a three-dimensional (3D) system-in-package (SIP) includes a first semiconductor chip, a second semiconductor chip, and a supporter. The first semiconductor chip includes a through silicon via (TSV), and the second semiconductor chip is stacked on the first semiconductor chip and is electrically connected to the first semiconductor chip through the TSV of the first semiconductor chip. The supporter is attached onto the first semiconductor chip so as to be spaced apart from an edge of the second semiconductor chip.

Stack package and semiconductor package including the same

A semiconductor package may include a substrate including a substrate pad on a top surface thereof; at least one semiconductor chip including a connection terminal electrically connected to the substrate on an active surface thereof, and mounted on the substrate; a heat release pattern formed between the substrate and the at least one semiconductor chip and configured to generate heat; and underfill resin underfilled between the substrate and the at least one semiconductor chip and comprising fillers. A semiconductor package may include a substrate including a substrate pad on a top surface thereof and a first heat release pattern configured to generate heat, and a semiconductor chip including a bonding pad formed on an active surface facing the substrate and a second heat release pattern configured to generate heat.

Semiconductor packages

Provided is a micro heat flux sensor array having reduced heat resistance. A micro heat flux sensor array may include a substrate, a plurality of first sensors formed on a first side of the substrate, and a plurality of second sensors formed on a second side of the substrate. Each of the plurality of first and second sensors may include a first wiring pattern layer of a first conductive material, a second wiring pattern layer of a second conductive material contacting the first wiring pattern layer, and an insulating layer in contact with the first and second wiring patterns.

Micro heat flux sensor array

A tape carrier package may include an interposer having a first surface and a second surface. The first surface of the interposer may be attached to an exposed active surface of a semiconductor chip. A heat sink may be attached to the second surface of the interposer.

Heat-radiating tape carrier package and method for manufacturing the same

A semiconductor package comprising a semiconductor chip and a first heat spreader adhered to the upper surface of the semiconductor chip is provided. The first heat spreader comprises a flat metal plate and a plurality of metal balls adhered to the flat metal plate. A method of fabricating the semiconductor chip package is also provided.

Growing community of inventors

Hwaseong-si, South Korea

Yun-Hyeok Im