Fujian Jinhua Integrated Circuit Co., Ltd.

Yun-Fan Chou

Hsien-Shih Chu

Feng-Ming Huang

Te-Hao Huang

Shi-Wei He

Yu-Cheng Tung

Gang Wu

Guoguo Kong

Canfa Dai

Dongxiang Zhu

Jianxiong Lai

A three-dimensional memory device includes a staircase structure comprising steps respectively comprising a conductive layers and a dielectric layer. A sidewall of the conductive layer is recessed from a sidewall of the dielectric layer to form a recess that exposes a portion of a bottom surface of the dielectric layer.

Three-dimensional memory device

A semiconductor structure and a method of forming the semiconductor structure are disclosed. Through forming an electrically conductive structure on a trench isolation structure, utilization of a space above the trench isolation structure is achievable, which can reduce the space required in a semiconductor integrated circuit to accommodate the electrically conductive structure, thus facilitating dimensional shrinkage of the semiconductor integrated circuit.

Semiconductor structure and method of forming same

A semiconductor device, a method of fabricating the semiconductor device and a memory are disclosed. In the provided semiconductor device, bit line contact plugs partially reside on insulating material layers in gate trenches in active areas and thus can come into sufficient contact with the active areas. This ensures good electrical transmission between the bit line contact plugs and the active areas even when there are internal voids in the bit line contact plugs. Such bit line contact plugs allowed to contain internal voids can be fabricated in an easier and faster manner, thus allowing a significantly enhanced memory fabrication throughput.

Method of fabricating semiconductor device having void in bit line contact plug

Semiconductor device having void in bit line contact plug

Growing community of inventors

Fujian, China

Yun-Fan Chou