Samsung Electro-mechanics Co., Ltd.

Yul Kyo Chung

Seung Eun Lee

Doo Hwan Lee

Yee Na Shin

Hyun Ju Jin

Jung Won Lee

Sung Taek Lim

In Hyung Lee

Seung Hyun Sohn

Tae Sung Jeong

Jun Hee Bae

Jin Seok Moon

Seung Hyun Kim

Won Hoon Song

Joo Hwan Jung

Moon Hee Yi

Eun Tae Park

Soo Hyun Lyoo

Hyung Mi Jung

Hyung Dong Kang

Jin Su Park

Byoung Hwa Lee

Hyun Ho Kim

Dae Hyun Park

Bae Kyun Kim

Jong In Ryu

Chul Jun Choi

Seung Yeop Kook

Jae Kul Lee

Hee Young Lee

Jeong Joo Kim

Ho Shik Kang

Dae Young Jung

Byung Ik Song

Eun Sub Lim

Won Geun Jung

Jong Chul Lee

A printed circuit board (PCB) including an embedded electronic component is provided. The printed circuit board includes a core having a cavity, an electronic component inserted into the cavity having a rough surface formed on surfaces of external electrodes provided on both lateral portions thereof, a low rough surface being formed in a portion of the rough surfaces, insulating layers laminated on upper and lower portions of the core and bonded to an outer circumferential surface of the electronic component insertedly positioned in the cavity, and an external circuit pattern provided on the insulating layers.

Method for manufacturing a printed circuit board including an embedded electronic component

A substrate for a camera module includes: a first substrate; an image sensor installed on the first substrate and a memory chip installed to be embedded in the first substrate. The first substrate includes a soft substrate portion disposed at a central portion of the first substrate, and a hard substrate portion formed on upper and lower portions of the soft substrate portion, and at least a portion of the memory chip is disposed in an installation hole formed in the soft substrate portion.

Substrate for camera module and camera module having the same

A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; a pattern layer disposed on the encapsulant and covering at least portions of the encapsulant adjacent to the inactive surface of the semiconductor chip; vias penetrating through the encapsulant and connecting the pattern layer and the inactive surface of the semiconductor chip to each other; and a second connection member disposed on the first connection member and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads of the semiconductor chip.

Fan-out semiconductor package

Disclosed herein is a printed circuit board (PCB) including an embedded electronic component, including: a core having a cavity; an electronic component inserted into the cavity having a rough surface formed on surfaces of external electrodes provided on both lateral portions thereof, a low rough surface being formed in a portion of the rough surfaces; insulating layers laminated on upper and lower portions of the core and bonded to an outer circumferential surface of the electronic component insertedly positioned in the cavity; and an external circuit pattern provided on the insulating layers.

Printed circuit board including embedded electronic component and method for manufacturing the same

A circuit board includes an inorganic material insulating layer, a first circuit pattern layer formed on a surface of the inorganic material insulating layer, a first build-up insulating layer formed on the inorganic material insulating layer and formed of an organic material, and a second circuit pattern layer formed on a surface of the first build-up insulating layer.

Circuit board and method of manufacturing the same

Disclosed herein are a printed circuit board including an electronic component embedded therein and a method for manufacturing the same. The printed circuit board including an electronic component embedded therein includes: a core formed with a cavity which is formed of a through hole and has a side wall formed with an inclined surface having a top and bottom symmetrically formed based on a central portion thereof; an electronic component embedded in the cavity; insulating layers stacked on upper and lower portions of the core including the electronic component; and external circuit layers formed on the insulating layers.

Printed circuit board including electronic component embedded therein and method for manufacturing the same

Disclosed herein is a multilayered substrate including: a second insulating layer having a fine pattern layer formed on an upper surface thereof; and a third insulating layer having a circuit pattern layer formed on an upper surface thereof and formed of a material different from the second insulating layer, the circuit pattern layer having a pattern pitch larger than that of the fine pattern layer, thereby making it possible to solve a warpage problem and perform refinement and improvement in a degree of integration of an inner wiring.

Multilayered substrate

The present invention relates to an electronic component embedded substrate including: a first insulating layer including a cavity; an electronic component inserted in the cavity; a first metal pattern formed on a lower surface of the first insulating layer to mount the electronic component thereon and including at least one guide hole for exposing a portion of the external electrode; a second insulating layer formed on the lower surface of the first insulating layer to cover the first metal pattern; a first circuit pattern formed on a lower surface of the second insulating layer; and a first via for electrically connecting the first external electrode exposed through the guide hole and the first circuit pattern, and can improve electrical connectivity between the external electrode and the via even when the size of the external electrode of the electronic component is reduced than before.

Electronic component embedded substrate and manufacturing method thereof

A substrate embedding a passive element includes a first conductor pattern layer disposed on a lower surface thereof and a second conductor pattern layer disposed on an upper surface thereof; a first via electrically connecting between the passive element and the first conductor pattern layer; and a second via electrically connecting between the passive element and the second conductor pattern layer, in which a volume of the first via is larger than that of the second via.

Substrate embedding passive element

The present invention relates to a multilayer ceramic capacitor and a printed circuit board including the same that can minimize thickness deviations of an external electrode and a multilayer ceramic. A multilayer ceramic capacitor according to an embodiment of the present invention includes a multilayer ceramic and external electrodes formed on both sides of the multilayer ceramic, wherein |T&#x2212;T| may be less than 10 &#x3bc;m, and |CT&#x2212;CT| may be less than 20 &#x3bc;m. (Here, Tis a maximum thickness of the external electrodes in a via processing area, Tis a minimum thickness of the external electrodes in the via processing area, CTis a maximum thickness of the multilayer ceramic capacitor in the via processing area, and CTis a minimum thickness of the multilayer ceramic capacitor in the via processing area.)

Multilayer ceramic capacitor and printed circuit board including the same

A substrate having an electronic component embedded therein includes a first insulating layer including a cavity and including first and second circuit patterns provided on upper and lower surfaces thereof, respectively; the electronic component at least partially inserted into the cavity and including an external electrode; a plurality of build-up insulating layers stacked on or beneath the first insulating layer; upper and lower circuit patterns formed on the build-up insulating layers, respectively; and a plurality of vias connecting the external electrode, the upper circuit pattern, the first circuit pattern, the second circuit pattern, and the lower circuit pattern.

Substrate having electronic component embedded therein and method of manufacturing the same

A multilayered substrate and a method of manufacturing the same. The multilayered substrate includes a plurality of wiring layers and reinforcing layers disposed at the outermost portions of both surfaces of the multilayered substrate, respectively, in order to decrease warpage of the multilayered substrate and has wiring patterns optimized depending on a scheme in which external electrodes are formed on an electronic component.

Multilayered substrate and method of manufacturing the same

The present invention relates to a passive device embedded in a substrate, which includes a laminate formed by alternately laminating a plurality of internal electrodes and dielectric layers; a first external electrode covering one side surface of the laminate and having a first upper cover region, which covers a part of an upper portion of the laminate, and a first lower cover region, which covers a part of a lower portion of the laminate and is smaller than the first upper cover region; and a second external electrode covering the other side surface of the laminate and having a second lower cover region, which covers a part of the lower portion of the laminate, and a second upper cover region, which covers a part of the upper portion of the laminate and is smaller than the second lower cover region, and the substrate.

Passive device embedded in substrate and substrate with passive device embedded therein

Disclosed herein are a semiconductor package and a method of manufacturing the same, the semiconductor package including: a molding member having a cavity formed therein; a device mounted in the cavity; an insulating member formed inside the cavity and on and/or beneath the molding member and the device; a circuit layer formed on the insulating member, and including vias and connection pads electrically connected with the device; a solder resist layer formed on the circuit layer, and having openings exposing upper portions of the connection pads; and solder balls formed in the openings.

Growing community of inventors

Yongin, South Korea

Yul Kyo Chung