Nec Corporation

Yukishige Saito

Hisashi Takemura

Risho Koh

Hitoshi Wakabayashi

Jong-Wook Lee

Munehiro Tada

Hiromitsu Hada

Yuko Yabe

Jyonu Ri

Yoshihiro Hayashi

Toshitsugu Sakamoto

Tsutomu Nakajima

Masayuki Terai

Atsushi Ogura

Shin Sato

Tohru Mogami

Yukinori Ochiai

Shigeharu Yamagami

Kimihiko Ito

Toyoji Yamamoto

Mitsuru Narihiro

Kohichi Arai

Yukihiro Furukawa

Yukihiro Sakotsubo

A resistance-variable element as disclosed has high reliability, high densification, and good insulating properties. The device provides a resistance-variable element in which a first electrode including a metal primarily containing copper, an oxide film of valve-metal, an ion-conductive layer containing oxygen and a second electrode are laminated in this order.

Resistance-variable element and method for manufacturing the same

Disclosed is a semiconductor device including a resistive change element between a first wiring and a second wiring, which are arranged in a vertical direction so as to be adjacent to each other, with an interlayer insulation film being interposed on a semiconductor substrate. The resistive change element includes a lower electrode, a resistive change element film made of a metal oxide and an upper electrode. Since the upper electrode on the resistive change element film is formed as part of a plug for the second wiring, a structure in which a side surface of the upper electrode is not in direct contact with the side surface of the metal oxide or the lower electrode is provided so that it is possible to realize excellent device characteristics, even when a byproduct is adhered to the side wall of the metal oxide or the lower electrode in the etching thereof.

Semiconductor device and method of manufacturing the same

A semiconductor device includes at least first and second electrodes, and a layer including a transition metal oxide layer sandwiched between the first and second electrodes. The transition metal oxide layer includes first and second transition metal oxide layers formed of different first and second transition metals, respectively. The first transition metal oxide layer is provided on the first electrode side, the second transition metal oxide layer is provided on the second electrode side, the first transition metal oxide layer and the second transition metal oxide layer are in contact with each other, the first transition metal oxide layer has an oxygen concentration gradient from the interface between the first transition metal oxide layer and the second transition metal oxide layer toward the first electrode side, and the oxygen concentration at the interface is greater than the oxygen concentration on the first electrode side.

Semiconductor device with variable resistance element and method for manufacturing the same

A semiconductor device includes (a) a semiconductor layer formed on an electrically insulating layer, (b) a gate insulating film formed on the semiconductor layer, (c) a gate electrode formed on the gate insulating film, and (d) a field insulating film formed on the semiconductor layer for defining a region in which a semiconductor device is to be fabricated. The semiconductor layer includes (a1) source and drain regions formed in the semiconductor layer around the gate electrode, the source and drain regions containing first electrically conductive type impurity, (a2) a body contact region formed in the semiconductor layer, the body contact region containing second electrically conductive type impurity, and (a3) a carrier path region formed in the semiconductor layer such that the carrier path region does not make contact with the source and drain regions, but makes contact with the body contact region, the carrier path region containing second electrically conductive type impurity.

Semiconductor device and method of fabricating the same

A semiconductor device includes a first insulating layer, a semiconductor layer formed on the first insulating layer, a second insulating layer on a part of the semiconductor layer, and a gate electrode formed on the semiconductor layer through the second insulating layer. The semiconductor layer includes a low concentration region formed under the gate electrode through the second insulating layer, two high concentration regions which are formed in at least upper regions on outer sides of the low concentration region under the gate electrode through the second insulating layer, and have an impurity concentration higher than an impurity concentration of the low concentration region, respectively, and two source/drain regions which are formed in side portions of the high concentration regions to have low concentration region side end portions, respectively. A width of the high concentration region is equal to or less than 30 nm.

SOI semiconductor device with improved halo region and manufacturing method of the same

A method of manufacturing a semiconductor device of the present invention includes (a) sequentially forming a gate insulating film, a first conductive layerand a first insulating filmon a semiconductor layerprovided on an insulating film; (b) selectively removing the semiconductor layer, the gate insulating film, the first conductive layer and the first insulating film to form a device isolation trench; (c) forming a second insulating filmin the device isolation [element separation] trench, wherein a height of an upper surface of the second insulating film is substantially coincident with that of an upper surface of the first insulating film; (d) removing a part of the second insulating film and the first insulating film such that a height of an upper surface of the exposed first conductive layer is substantially coincident with that of the top surface of the second insulating film; and (e) patterning the first conductive layer to form a gate electrode.

Semiconductor device and method that includes reverse tapering multiple layers

A semiconductor device includes a semiconductor layer formed on an insulator, a gate insulating film formed on the semiconductor layer, a gate electrode formed on the gate insulating film and extending in a first direction, source/drain regions formed in the semiconductor layer on both sides of the gate electrode, a body contact region in the semiconductor layer, a partial isolating region in which a field insulating film thicker than the gate insulating film intervenes between the semiconductor layer and an extending portion of the gate electrode, and a full isolating region in which the semiconductor layer on the insulator is removed. The full isolating region is formed to be in contact with at least a part of a side parallel to the first direction of the source/drain regions.

SOI MOSFET

One object of the present invention is to suppress a threshold voltage of at least an n-channel MISFET using a nitride of a high melting point metal at it's gate electrode. In order to achieve the object, a gate electrodeof a p-channel MISFET is constituted of a titanium nitride filmand a tungsten filmformed on the filmand a gate electrodeof an n-channel MISFET is constituted of a titanium nitride filmand a tungsten filmformed on the film. The titanium nitride filmis formed by nitrogen ion implantation in the titanium nitride filmto decrease the work function.

One object of the present invention is to suppress a threshold voltage of at least an n-channel MISFET using a nitride of a high melting point metal at it's gate electrode. In order to achieve the object, a gate electrode of a p-channel MISFET is constituted of a titanium nitride film and a tungsten film formed on the film and a gate electrode of an n-channel MISFET is constituted of a titanium nitride film and a tungsten film formed on the film . The titanium nitride film is formed by nitrogen ion implantation in the titanium nitride film to decrease the work function.

A polishing agent recovery and reuse method and device for the same removes large impurities by a filtration device, concentrates by an ultrafiltration device, and continuously recovers polishing agent. Polishing agent used in polishing a semiconductor board or a coating formed on top of a semiconductor board is collected in a pre-processing container after use. Large impurities are removed by a dual fine filtration device. The resulting filtrate is concentrated by an ultrafiltration device. The concentrated solution may then be mixed with filtrate from the dual fine filtration device to further concentrate the polishing agent. The concentration of the polishing agent in the concentrated solution, the pH, and the temperature of the solution are continuously monitored and controlled. The filtrate of the ultrafiltration device is further treated to remove impurities, resulting in pure or ultrapure water. The recovered polishing agent may be reused in further polishing steps.

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Tokyo, Japan

Yukishige Saito