Hitachi, Ltd.

Kabushiki Kaisha Toshiba

Seiko Instruments Inc

Showa Yakuhin Kako Co., Ltd.

Oki Electric Industry Co., Ltd.

Kabushiki Kaisha Iseki Kaihatsu Koki

Hitachi Displays, Ltd.

Japan Vilene Company, Ltd.

Yamato Scientific Co., Ltd.

Toa Grout Kogyo Kabushiki Kaisha

Toyo Cushion Co., Ltd.

Yukio Suzuki

Ikuro Masuda

Masahiro Iwamura

Shinji Kadono

Akira Uragami

Masayoshi Yoshimura

Toshiaki Matsubara

Katsumi Ogiue

Masanori Odaka

Hideaki Uchida

Masami Kawamura

Shinichi Sato

Hiromi Ando

Yasuo Kominami

Kunio Seki

Atsushi Fukasawa

Takuro Sato

Masanori Ienaka

Takashi Osada

Kazuhiro Ono

Yoshio Sakamoto

Yoshikazu Kojima

Tatsumi Yamauchi

Shigeo Moriyama

Susumu Nagano

Akihiko Suzuki

Akira Misumi

Sachio Koizumi

Masanori Miyagi

Masaharu Kumada

Haruhiro Shiino

Hiroaki Mori

Masayuki Aoki

Toshifumi Komiya

Haruo Konishi

Noriyuki Iwata

Tetsushi Okamoto

Yumi Takizawa

Manabu Shibata

Kazuaki Kubo

Takamichi Sujaku

Fumio Sawa

Yasuo Shoji

Kazuo Sunahara

Mitsuhiro Haraguchi

Yoshihiko Kawasaki

Nobuichi Nishimura

Takashi Kugaya

Naoki Kumagai

Hisashi Kitajima

Hiroyoshi Tsuchiya

Tooru Ootaka

Shigeo Ootsuki

Naohiko Shimono

Yoshio Okamura

Ryuho Narita

Mitsuhiko Koyama

Shigehito Ishii

Sinkiti Ooka

Sohei Okamoto

Kazunori Ishii

Takeshi Orii

Hidehiro Noda

Hisao Kano

Takumi Ohno

Masahiko Wada

Akira Urragami

Junko Shima

Shyuichi Oowada

Makoto Kajiwara

Ryuji Igarashi

Kenichi Togawa

Akiro Uragami

Yoko Sugawa

Minoru Kato

Miyoko Hirai

Kazuo Irobe

Takanobu Haruki

Yoshihiro Suzuki

Tamotsu Konishi

Hiroki Kanamaru

The present invention provides a solution to the above-described drawbacks, and more specifically, as the tape-like or sheet-like insulation member, the resin matrix in which the first particles having a heat conductivity of 1 W/mK or higher and 300 W/mK or lower, that are diffused in the resin matrix, and the second particles having a heat conductivity of 0.5 W/mK or higher and 300 W/mK or lower, are diffused, is employed.

Highly heat conductive insulating member, method of manufacturing the same and electromagnetic device

The indirectly heated cathode structure includes a base metal having a thermal electron emitting material layer, a cylindrical sleeve holding the base metal at one end portion thereof and housing a heating heater in the inside thereof, an support having a large-diameter portion and g a small-diameter portion, and a cathode disc having a large-diameter portion at the leg-portion-side of the heating heater and having a small-diameter portion at the heater-main-portion side of the heating heater, wherein an outer surface of another end portion of the sleeve and an inner surface of the small-diameter portion of the support are fixed to each other, and an outer surface of the large-diameter portion of the support and an inner surface of the small-diameter portion of the cathode disc are fixed to each other.

Cathode ray tube

An objective of the present invention is to provide a burnishing pad, capable of removing dirt by burnishing a place (i.e., a dirty point) onto which dirt attaches to impart sufficient luster, and being biodegraded; a burnishing machine equipped with the burnishing pad; and a burnishing method using the burnishing pad. The burnishing pad of the invention is comprised of a lock-like fiber composite in which adjacent fibers are bonded at intersection thereof, wherein said fiber is at least one selected from the group consisting of a vegetable fiber and an animal fiber. And another burnishing pad is a fiber composite comprised of thick fibers of 150 &#x3bc;m or more in fiber diameter. These pads can be equipped with a porous supporting layer, respectively. The porous supporting layer has a mean 5% modulus strength of 20 N/5 cm width or more at 70&#xb0; C. and a unit area weight of 100 g/mor less.

Burnishing pad, burnishing machine equipped with burnishing pad and burnishing method

Rotary machining apparatus

Writing of unwanted data is inhibited if signals other than a required number of clocks are applied for a program for a memory. A program control circuit 1 delivers a write-starting instruction. A clock number-detecting circuit 2 for detecting a given number of clocks necessary for a program for a memory produces an output signal to the program control circuit 1.

Semiconductor integrated circuit

Composition for local anesthesia

Aqueous composition containing cromoglycic acid

An EEPROM operable at a reduced power source voltage comprises a decoder circuit for decoding input signals, a memory array for storing the decoded, a reading circuit for operating the decoder circuit and the memory array, and for reading out data stored in the memory array, and a writing circuit for operating the decoder circuit and the memory array, and for writing data to the memory array. The EEPROM is divided into a first circuit area comprising a plurality of first transistors driven by a first power source voltage, an absolute value of a threshold voltage of the first transistors in the first circuit area being within the range of approximately 0.3 V to 0.7 V, the first circuit area including at least the reading circuit, and a second circuit area comprising a plurality of second transistors driven by a second power source voltage, an absolute value of a threshold voltage of the second transistors in the second circuit area being within the range of approximately 0.7 V to 0.9 V, the second circuit area including at least the writing circuit.

Integrated logic circuit and EEPROM

A semiconductor integrated circuit comprises a semiconductor substrate of a first conductivity type, at least one electrically erasable floating gate type semiconductor non-volatile memory transistor disposed on a surface of the semiconductor substrate, a well region of a second conductivity type formed in the surface of the semiconductor substrate, and a program voltage switching transistor of the first conductivity type disposed in the well region. A field insulation film is disposed on the surface of the semiconductor substrate. A field dope region of the first conductivity type is provided beneath the field insulation film. The field dope region preferably has an impurity concentration higher than an impurity concentration of the semiconductor substrate. By this construction, current leakage is prevented at the time when a high voltage occurs such as, for example, when performing a writing operation with respect to EEPROM.

In an input level converter for TTL--CMOS level conversion (or other conversion to CMOS) for an internal logic block operating with CMOS levels, an output transistor for executing the charge or discharge of the output capacitance thereof is formed of a bipolar transistor. Thus, the propagation delay times and their capacitance-dependencies of the input level converter can be lessened. Similarly, in an output level converter for CMOS--TTL level conversion (or other conversion from CMOS) for the internal logic block operating with the CMOS levels, an output transistor for executing the charge or discharge of the output load capacitance thereof is formed of a bipolar transistor. Thus, the propagation delay times and their capacitance-dependencies of the output level converter can also be lessened.

BiCMOS tri-state output driver

Level conversion circuitry for a semiconductor integrated circuit

In order to provide high speed and low power consumption, a semiconductor integrated circuit is constructed to utilize both CMOS elements and bipolar transistors. The bipolar transistors are used in the output portions to take advantage of their speed of operation to allow rapid charging and discharging of output lines. In the meantime, the principal operating portions of the circuit use CMOS elements of low power consumption. This arrangement is particularly advantageous in memory circuits.

A microwave oven includes a heating chamber, a plurality of cooking utensils detachably disposed in the heating chamber selectively in accordance with the cooking contents, a plurality of heat sources heating food placed on or contained in the cooking utensil and including a magnetron, an oven heater and a grill heater, optical sensors determining the cooking utensil disposed in the heating chamber, and a microcomputer. The cooking utensils include a glass dish, thawing gridiron, pot, upper and lower top plates, one-legged top plate, and gridiron. A microwave cooking mode is selected when the determination of the optical sensors indicates that neither upper nor lower top plate is present in the heating chamber. A heater cooking mode is selected when either upper or top plate is present. When the heater cooking mode is selected on the basis of presence of the upper top plate, either an oven mode or a grill mode is selected depending upon presence or absence of the gridiron. One of the heat sources in accordance with the selected cooking mode is controlled on the basis of a cooking program of the selected cooking mode by the microcomputer.

Microwave oven with automatic cooking mode selecting function

In an input level converter for TTL-CMOS level conversion (or other conversion to CMOS) for an internal logic block operating with CMOS levels, an output transistor for executing the charge or discharge of the output capacitance thereof is formed of a bipolar transistor. Thus, the propagation delay times and their capacitance-dependencies of the input level converter can be lessened. Similarly, in an output level converter for CMOS-TTL level conversion (or other conversion from CMOS) for the internal logic block operating with the CMOS levels, an output transistor for executing the charge or discharge of the output load capacitance thereof is formed of a bipolar transistor. Thus, the propagation delay times and their capacitance-dependencies of the output level converter can also be lessened.

Growing community of inventors

Tokyo, Japan

Yukio Suzuki