Kabushiki Kaisha Toshiba

Yukio Nakabayashi

Tatsuo Shimizu

Toshihide Ito

Johji Nishio

Chiharu Ota

Ryosuke Iijima

Masumi Saitoh

Toshinori Numata

Takashi Shinohe

Atsuhiro Kinoshita

Junji Koga

Shigeto Fukatsu

Shunsuke Asaba

Kazumi Nishinohara

Naoki Yasuda

Makoto Mizukami

Jun Fujiki

Hiroshi Kono

Kiwamu Sakuma

Ken Uchida

Atsuko Yamashita

According to one embodiment, a method for manufacturing a semiconductor device is disclosed. The method can include preparing a structure body, the structure body including a silicon carbide member and a first film stacked with the silicon carbide member. The first film includes silicon and oxygen. The method can include performing a first treatment of heat-treating the structure body in a first atmosphere including hydrogen. The method can include, after the first treatment, performing a second treatment of heat-treating the structure body in a second atmosphere including nitrogen and oxygen. An oxygen concentration in the second atmosphere is not less than 5 ppm and not more than 1000 ppm.

Semiconductor device and method for manufacturing semiconductor device

A semiconductor device according to an embodiment includes: a silicon carbide layer; a silicon oxide layer; and a region disposed between the silicon carbide layer and the silicon oxide layer and having a nitrogen concentration equal to or more than 1×10cm. Nitrogen concentration distribution in the silicon carbide layer, the silicon oxide layer, and the region have a peak in the region, a nitrogen concentration at a position 1 nm away from the peak to the side of the silicon oxide layer is equal to or less than 1×10cm, and a carbon concentration at the position is equal to or less than 1×10cm.

Semiconductor device, method for manufacturing semiconductor device, inverter circuit, drive device, vehicle, and elevator

A semiconductor device according to an embodiment includes: a silicon carbide layer; a silicon oxide layer; and a region disposed between the silicon carbide layer and the silicon oxide layer and having a nitrogen concentration equal to or more than 1×10cm. A nitrogen concentration distribution in the silicon carbide layer, the silicon oxide layer, and the region have a peak in the region, a nitrogen concentration at a first position 1 nm away from the peak to the side of the silicon oxide layer is equal to or less than 1×10cmand a carbon concentration at the first position is equal to or less than 1×10cm, and a nitrogen concentration at a second position 1 nm away from the peak to the side of the silicon carbide layer is equal to or less than 1×10cm.

A semiconductor device according to an embodiment includes: a silicon carbide layer; a silicon oxide layer; and a region disposed between the silicon carbide layer and the silicon oxide layer and having a nitrogen concentration equal to or more than 1&#xd7;10cm. Nitrogen concentration distribution in the silicon carbide layer, the silicon oxide layer, and the region have a peak in the region, a nitrogen concentration at a position 1 nm away from the peak to the side of the silicon oxide layer is equal to or less than 1&#xd7;10cm, and a carbon concentration at the position is equal to or less than 1&#xd7;10cm.

This semiconductor device according to an embodiment includes: a silicon carbide layer; a gate electrode; a silicon oxide layer between the silicon carbide layer and the gate electrode; and a region between the silicon carbide layer and the silicon oxide layer and having a nitrogen concentration not less than 1&#xd7;10cm. A nitrogen concentration distribution in the silicon carbide layer, the silicon oxide layer, and the region has its peak in the region, and a state density Zin a portion is not more than 1&#xd7;10cm. The portion is within 100 nm from the silicon oxide layer toward the silicon carbide layer. A nitrogen concentration and a carbon concentration in a position 1 nm from the peak toward the silicon oxide layer is not more than 1&#xd7;10cm, and a nitrogen concentration in a position 1 nm from the peak toward the silicon carbide layer is not more than 1&#xd7;10cm.

Semiconductor device, semiconductor device manufacturing method, inverter circuit, driver device, vehicle, and elevator

A semiconductor device according to an embodiment includes: a silicon carbide layer; a silicon oxide layer; and a region disposed between the silicon carbide layer and the silicon oxide layer and having a nitrogen concentration equal to or more than 1&#xd7;10cm. A nitrogen concentration distribution in the silicon carbide layer, the silicon oxide layer, and the region have a peak in the region, a nitrogen concentration at a first position 1 nm away from the peak to the side of the silicon oxide layer is equal to or less than 1&#xd7;10cmand a carbon concentration at the first position is equal to or less than 1&#xd7;10cm, and a nitrogen concentration at a second position 1 nm away from the peak to the side of the silicon carbide layer is equal to or less than 1&#xd7;10cm.

According to one embodiment, a semiconductor device includes a silicon carbide member, first, second, and third electrodes, and a first insulating member. The silicon carbide member includes first, second, and third silicon carbide regions. The first silicon carbide region includes first, second, third, and fourth partial regions. The third partial region is between the first and second partial regions. The fourth partial region is between the third partial region and the first electrode. The second silicon carbide region includes first and second semiconductor regions. The third silicon carbide region includes third and fourth semiconductor regions. The first insulating member includes first, second, and third insulating regions. The second electrode is electrically connected to the first silicon carbide region. The third and fourth partial regions are between the second and first electrodes. The third electrode is electrically connected to the second silicon carbide region.

Semiconductor device

A semiconductor device of an embodiment includes: a nitride semiconductor layer including a first GaN region of n-type, a second GaN region of n-type on the first GaN region, a third GaN region of p-type on the first GaN region, a fourth GaN region of p-type sandwiching the second GaN region with the third GaN region, a fifth GaN region of p-type on the third GaN region, a sixth GaN region of p-type sandwiching the second GaN region with the fifth GaN region, a seventh GaN region of n-type on the fifth GaN region, an eighth GaN region of n-type on the sixth GaN region, a trench between the seventh GaN region and the eighth GaN region, the trench having an inclination angle of less than 90 degrees; a gate insulating layer including an aluminum nitride film in the trench; a gate electrode; a first electrode; and a second electrode.

Semiconductor device, power supply circuit, and computer

According to one embodiment, a method for manufacturing a semiconductor device is disclosed. The method can include performing a first heat treatment of a first film at a first temperature not less than 500&#xb0; C. and not more than 900&#xb0; C. in a first atmosphere including oxygen. The first film includes silicon and oxygen and is deposited on a semiconductor member including silicon carbide. The method can include performing, after the first heat treatment, a second heat treatment of the first film at a second temperature not less than 1200&#xb0; C. but less than 1400&#xb0; C. in a second atmosphere including nitrogen.

Method for manufacturing semiconductor device

A semiconductor device of an embodiment includes a silicon carbide layer; a gate electrode; a gate insulating layer disposed between the silicon carbide layer and the gate electrode; a first region disposed in the silicon carbide layer and containing nitrogen (N); and a second region disposed between the first region and the gate insulating layer, and containing at least one element selected from the group consisting of nitrogen (N), phosphorus (P), arsenic (As), antimony (Sb), scandium (Sc), yttrium (Y), lanthanum (La), lanthanoids (Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu), hydrogen (H), deuterium (D), and fluorine (F).

Semiconductor device, method for manufacturing semiconductor device, inverter circuit, driving device, vehicle, and elevator

A semiconductor device manufacturing method of an embodiment includes the steps of: forming a first insulating layer on a semiconductor substrate; forming on the first insulating layer an amorphous or polycrystalline semiconductor layer having a narrow portion; forming on the semiconductor layer a second insulating layer having a thermal expansion coefficient larger than that of the semiconductor layer; performing thermal treatment; removing the second insulating layer; forming a gate insulating film on the side faces of the narrow portion; forming a gate electrode on the gate insulating film; and forming a source-drain region in the semiconductor layer.

Semiconductor device and method for manufacturing the same

The semiconductor device of this embodiment includes: a first region of a first conductivity type SiC; a second region of a first conductivity type SiC, impurity concentration of first conductivity type of the second region being lower than impurity concentration of first conductivity type of the first region; a third region of a second conductivity type SiC provided between the first region and the second region; a Si layer provided on surfaces of the first, second, and third regions, a thickness of the Si layer on the third region being thicker than a thickness of the Si layer on the second region; a gate insulating film provided on the Si layer; and a date electrode provided on the gate insulating film.

Semiconductor device and method of manufacturing the same

A semiconductor device of an embodiment includes a first conductive type silicon carbide substrate having first and second main surfaces, a first conductive type silicon carbide layer formed on the first main surface, a second conductive type first silicon carbide region formed in the silicon carbide layer, and a first conductive type second silicon carbide region formed in the first silicon carbide region. The device includes a trench penetrating through the first and second silicon carbide regions, and a second conductive type third silicon carbide region formed on a bottom and a side surface of the trench. The third silicon carbide region is in contact with the first silicon carbide region, and is formed between the trench and the silicon carbide layer. In addition, the device includes a gate insulating film formed in the trench, a gate electrode, a first electrode, and a second electrode.

Growing community of inventors

Yokohama, Japan

Yukio Nakabayashi