Fujitsu Ten Limited

Fujitsu Semiconductor Limited

Renesas Electronics Corporation

Fujitsu Corporation

Renesas Technology Corp.

Yukio Ishikawa

Susumu Nishihashi

Kaoru Noumi

Yasuyuki Umezaki

Hidetaka Ebeshu

Shigeo Koide

Yukio Fujisawa

Hiroaki Shimauchi

Tomoyuki Katou

Tomohide Kasame

Tsuyoshi Takatori

Teruhiko Kamibayashi

Junji Takahashi

Nobuaki Kawasoe

Akiko Furuya

Tomohiro Matsuo

Satoshi Fukui

Daisuke Enomoto

Masayoshi Kusumoto

Masahiko Kusaki

Kokoro Hayashi

Naoto Shimoji

Kensuke Matsuda

Nobuaki c/oFujitsu Ltd Kawasoe

Akiko c/oFujitsu Ltd Furuya

Yasuyuki c/oFujitsu Limited Umezaki

Naoto c/oFujitsu Ltd Shimoji

Masayoshi c/oFujitsu Ltd Kusumoto

A voltage detecting device according to an aspect of embodiments includes a detecting unit and a mode switching unit. The detecting unit detects voltages of battery cells of a battery stack in which the battery cells are connected to each other. The mode switching unit switches between an active mode in which the detecting unit detects the voltages and a standby mode in which a current flowing into the detecting unit is less than a predetermined value. Moreover, the detecting unit includes a voltage detecting unit that detects the voltages of the battery cells and/or a voltage of a power supply of the detecting unit in a predetermined interval. The mode switching unit switches between the active mode and the standby mode in accordance with a timing at which the voltage detecting unit detects the voltage (s).

Voltage detecting device and voltage detecting method

An electric storage apparatus according to one aspect of an embodiment includes a plurality of storage batteries, a virtual processing unit, and a connection controlling unit. The virtual processing unit virtually and sequentially connects in parallel two or more storage batteries, of the plurality of storage batteries, having a potential difference or potential differences within a predetermined range so as to equalize electric potentials of the two or more storage batteries. The connection controlling unit connects in parallel the two or more storage batteries in a connection order for maximizing the number of the two or more storage batteries to be connected in parallel when the virtual processing unit sequentially connects in parallel the two or more storage batteries in an order from highest electric potential to lowest one and in an order from lowest electric potential to highest one.

Electric storage apparatus and electric-storage controlling method

An electric storage apparatus according to one aspect of an embodiment includes a battery unit, a determination unit, a virtual processing unit, and a connection controlling unit. The battery unit includes storage batteries to be connected in parallel. The determination unit determines, when the battery unit is started up, a startup type indicating a discharge start or a charge start. The virtual processing unit generates connection orders. Each of the connection orders is obtained by virtually and sequentially connecting in parallel storage batteries, of the storage batteries, having potential differences within a predetermined range so as to equalize electric potentials of the storage batteries. The connection controlling unit selects, among from the connection orders, a connection order in which the equalized electric potential is an electric potential according to the startup type determined by the determination unit, so as to connect in parallel the storage batteries.

An electric storage apparatus according to one exemplary aspect of an embodiment of the disclosure includes a battery unit, a determination unit, and a connection controlling unit. In the battery unit, a plurality of storage batteries is connected in parallel. Each of the storage batteries includes serially connected electric storage elements.

There is provided a voltage detecting device. A plurality of detecting units are configured to detect voltages of a plurality of battery stacks of a battery pack having the plurality of battery stacks each having a plurality of battery cells connected, at intervals of a predetermined period, respectively. A mode switching unit is configured to perform switching between an active mode in which the detecting units detect the voltages and a standby mode in which the value of an electric current flowing in the detecting units is smaller than a predetermined value. A timing changing unit is configured to change start timings or/and finish timings of the active mode.

A gateway apparatus for performing transfer control of frame data between communication channels includes a routing map that stores ID information about the frame data and information about a communication channel that uses the ID information, and a search engine unit that routes the frame data to a transfer destination on the basis of the ID information of the frame data received and the routing map. The search engine unit does not transfer the frame data to the transfer destination when the ID information about the frame data received is ID information that is not used in the communication channel through which the frame data is received.

Gateway apparatus and data transfer control method

An error detector has a parity bit generator which generates error detection data for data strings sent from a CPU I/F to a memory, a parity checker which detects an error in the data strings output from the memory based on the error detection data, and a selector circuit which switchingly outputs the data from the parity bit generator and the data from a CPU which sends diagnostic data. While the selector circuit is switched to output the data from the CPU, based on the error detection data output from the selector circuit, the error detector conducts a failure diagnosis of error detection functions including at least one of the parity bit generator and the parity checker.

Error detector and error detection method

A gateway apparatus for performing transfer control of frame data between a plurality of different communication channels is provided with a time stamp unit for adding time stamp information to received frame data and a data discarding unit for determining processing delay of the frame data or abnormality of the apparatus by referring to the time stamp information and for deleting the time stamp information added to the frame data at the time of sending the frame data.

Gateway apparatus and data managing method

A communication conversion apparatus achieve efficient conversion without conversion delay and converts messages that effect communication with different communication protocols and schedules. In a message conversion apparatus that performs message conversion of different communication protocols, a routing circuit and a scheduler circuits that perform scheduling of the different communication protocols are separately provided. And time-triggered scheduling and event-triggered scheduling are separately performed. Conversion of FlexRay and CAN messages can be efficiently implemented.

Communication message conversion apparatus and communication message conversion method

There is provided a gateway apparatus that controls a forwarding process of frame data between multiple communication channels, said gateway apparatus including a search engine that is respectively provided for each of the multiple communication channels to route the frame data between the multiple communication channels, and a first storage portion that is respectively provided for each of the multiple communication channels to temporarily stores the frame data routed.

Gateway apparatus and routing method

An FM-CW radar includes a transmitting section, a mixing section, an A/D conversion section, a storage unit, and a signal processing section. The transmitting section transmits a continuous wave frequency-modulated with a triangular wave. The mixing section mixes the continuous wave transmitted and a reflected wave from a target, to generate a beat wave. The A/D conversion section A/D converts the beat wave into digital data. The storage unit includes a first storage section and a second storage section. The signal processing section reads data from the first storage section to process the read data. The A/D conversion section writes the digital data into the second storage section. The control section switches the first storage section and the second storage section alternately in synchronous with switching between up and down of the triangular wave.

FM-CW radar

Provided is a RAM check unit capable of checking a RAM included in a radar system even when the radar system is in operation. An LSI instructs a high-frequency unit to output a radar-transmitted signal. When a radar-received signal is received from the high-frequency unit, calculation is performed based on the signal. The result of the calculation is transferred to a CPU. The CPU transmits a calculated distance to the outside. When a processing end sensing unit included in the LSI senses termination of radar-received signal processing, an RAM check unit initiates RAM check. When the RAM check is terminated, the high-frequency unit is instructed to output a radar-transmitted signal. Consequently, the RAM check is performed during a period between pieces of radar-received signal processing during which a load on the LSI is light. Thus, the RAM check can be performed even when the radar system is in operation.

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Kobe, Japan

Yukio Ishikawa