Matsushita Electric Industrial Co., Ltd.

Panasonic Corporation

Fuji Xerox Co., Ltd.

Panasonic Intellectual Property Management Co., Ltd.

Matsushita Electrical Industrial Co., Ltd.

Yukio Iijima

Nobuaki Minakuchi

Yasushi Ueda

Makoto Okazaki

Hidemi Takahashi

Takahiro Saito

Satoshi Ishikura

Hajime Ichida

Yuka Aoki

Kazunori Yamada

Makoto Usui

Takeshi Onishi

Takahiro Nagai

Junichi Matsunoshita

Hironori Tanaka

Toshinori Maeda

Hideo Fujii

Yu Hasegawa

Masanobu Kanaya

Shintaro Kojo

Noriyuki Kajitani

A charging apparatus is provided that avoids a reduction in the strength of radio waves or a magnetic field used by a charging target device having a wireless communication function and reduces an influence on the radio waves or magnetic field. In this apparatus, position detection section () detects a position of power reception coil () of charging target device () placed on charging table (). Power transmission coil () is made close to power reception coil () and transmits electric power. Coil moving mechanism () brings power transmission coil () close to the position of power reception coil () that is detected by position detection section ().

Charging apparatus

An optical disc recording and reproducing apparatus for recording and reproducing data in and from an optical disc by the use of the optical disc as a recording medium, comprises analog processing means including a binarization unit for subjecting a signal read from the optical disc to binarization and a servo unit for controlling recording and reproducing a signal in and from the optical disc; synchronous clock generating means for generating a synchronous clock signal which is synchronized with the signal read from the optical disc; address detecting means for detecting address information indicating a physical position on the optical disc based on the signal read from the optical disc, and outputting a signal indicating the address information and a signal indicating that the address has been detected when the address information has been detected; a sector counter for holding a sector count value of a sector as a recording unit on the optical disc, and updating the sector count value according to the synchronous clock signal and the signal output from the address detecting means; and gate signal generation switching means for generating gate a signal which controls the analog processing means, based on one of the sector count value held in the sector counter and information obtained from the analog processing means, according to the signal indicating that the address has been detected, which is output from the address detecting means.

Optical disc recording and reproduction apparatus having automatic gate signal generation modes

A print control apparatus includes a print request receiving unit and a print control unit. The print request receiving unit receives a print request, including print target information, to a print apparatus. If a condition is satisfied under which print target information should have information regarding security added thereto for printing, the print control unit adds the information regarding security to the print target information and causes the print apparatus to print the print target information to which the information regarding security is added. If the condition is not satisfied, the print control apparatus stores the print target information included in the print request in a storage unit, and when an operation receiving unit provided in the print apparatus is operated to instruct to print the stored print target information, the print control apparatus causes the print apparatus to print the stored print target information.

Print control apparatus, print apparatus, print control method, computer-readable medium and computer-data signal

An image processing device includes a judgement section and a generation section. A latent image, which would be retained or eliminated by photocopying, is to be superposed with machine-readable code images, which are encoded supplementary information, to generate a superposed image. The judgement section judges overlapping of the latent image with the machine-readable code images. The generation section, on the basis of judgement results from the judgement section, determines an arrangement of the machine-readable code images and generates the superposed image.

Image processing device, image processing method and storage medium storing image processing program

Optical disc recording and reproduction apparatus

A semiconductor device, including a dummy diffused layer in the upper part of a substrate, has its noise immunity improved. The dummy diffused layer is formed between analog and digital blocks to eliminate dishing, which usually occurs during a CMP process for defining STI regions. The surface of the dummy diffused layer is covered with an anti-silicidation film at least partially and a dummy gate electrode so as not to be silicided. The dummy gate electrode can be formed along with a normal gate electrode for a transistor.

Method of making a semiconductor device with dummy diffused layers

A semiconductor device, including a dummy diffused layer in the upper part of a substrate, has its noise immunity improved. The dummy diffused layer is formed between analog and digital blocks to eliminate dishing, which usually occurs during a CMP process for defining STI regions. The surface of the dummy diffused layer is covered with an anti-silicidation film at least partially and a dummy gate electrode so as not to be silicided. The dummy gate electrode can be formed along with a normal gate electrode for a transistor. Accordingly, there is no need to add any extra process step to the fabrication process.

Semiconductor device having noise immunity

The present invention provides an error correction apparatus and an error correction method, which does not execute unnecessary syndrome operation and operation processing subsequent to the syndrome operation. A format interface judges whether an uncorrectable error is included in parallel with demodulation of received data, and outputs an error correction incapability detection signal when the uncorrectable error is included. The error correction circuit executes decoding of the error correction, including syndrome operation, for demodulated data from the format interface , suspends the syndrome operation when the error correction incapability detection signal is input, and terminates the error correction.

Method and apparatus for error correction

A data transfer device for successively storing data in a data storage unit or successively reading data from the data storage unit in data processing using an array of m rows&times;n columns, comprises a data storage unit for retaining data which have been stored in storage positions specified by row addresses indicating the positions in the row direction and column addresses indicating the positions in the column direction; a transfer address generation unit for generating transfer addresses comprising the row addresses and the column addresses so that the storage positions for transferred data are successively specified in each of storage blocks having a predetermined size and arranged in the row direction of the data storage unit; and a transfer control unit for controlling data transfer to the data storage unit by using the transfer addresses generated by the transfer address generation unit.

Data transfer device and data transfer method

Optical disc recording and reproducing apparatus having automatic gate signal generation modes

A waveform generation apparatus comprises a delay circuit comprising i pieces of unit delay circuits connected in series, and providing i kinds of delay states by deriving signals from the respective unit delay circuits; k pieces of selection circuits each selecting one delay state from among the i kinds of delay states; a waveform generation circuit for generating n pieces of binary state signals in the same state, or generating n pieces of binary-state signals having a shape according to recording data supplied from the outside, on the basis of the signals having the i kinds of delay states; a transmission path for transmitting the n pieces of binary-state signals generated by the waveform generation circuit; a waveform synthesis circuit for generating a signal having multi-valued information from the n pieces of binary-state signals transmitted through the transmission path; a phase difference detection circuit for detecting phase differences among the n pieces of binary-state signals in the same state, when the n pieces of binary-state signals in the same state are transmitted through the transmission path; and an offset control circuit for controlling the k pieces of selection circuit on the basis of phase difference information from the phase difference detection circuit, and adding offset values to target delays, thereby to eliminate the phase differences among the signals in the transmission circuit.

Waveform generation apparatus and waveform generation method

Growing community of inventors

Ikoma, Japan

Yukio Iijima