Matsushita Electric Industrial Co., Ltd.

Panasonic Corporation

Yukio Hiraoka

Hisashi Adachi

Toshifumi Nakatani

Makoto Sakakura

Toshiakira Andoh

Kouji Takinami

Koji Takinami

Shunsuke Hirano

Takayuki Tsukizawa

Yasunori Miyahara

Takayuki Kai

Iwao Kojima

Shinichiro Uemura

Takayuki Shimazu

Ryoichi Yamada

Hiroki Kojima

A digital circuit portion () and an analog circuit portion () are formed in a surface portion of a semiconductor substrate (). A via () is formed in a region between the digital circuit portion () and the analog circuit portion (). The via () extends through the semiconductor substrate () from a front surface to a back surface thereof, and is made of a dielectric () having its surface covered by a metal (). The metal () is grounded. Signal interference between the analog circuit portion () and the digital circuit portion () is reduced by the via ().

Semiconductor device

The present invention provides a differential voltage control oscillator including: a parallel resonance circuit in which an inductor circuit, a variable capacitance circuit, and a radio-frequency switching circuit are connected in parallel together; and a negative resistance circuit connected in parallel with the parallel resonance circuit. The radio-frequency switching circuit includes: a first switching element; a first capacitive element; a second switching element; a second capacitive element; a control voltage terminal for supplying a common control voltage to the first and second switching control terminals, the control voltage terminal being connected to a virtual ground point for a differential signal generated in the parallel resonance circuit; a first radio-frequency signal reduction section connected between the control voltage terminal and the first switching element; and a second radio-frequency signal reduction section connected between the control voltage terminal and the second switching element.

Differential voltage control oscillator including radio-frequency switching circuits

A semiconductor differential circuit comprising a semiconductor substrate, a first semiconductor device on the semiconductor substrate having a gate electrode for having one of differential signals conveyed thereto and a drain electrode for outputting one of the differential signals controlled by the gate electrode, a second semiconductor device formed on the semiconductor substrate having a gate electrode for having the other of the differential signals conveyed thereto and a drain electrode for outputting the other of the differential signals controlled by the gate electrode, and wherein the drain electrode and drain electrode are placed in the proximity so that, at a predetermined frequency, it is equivalent to the one in which the drain electrode is grounded via a predetermined resistance, and the drain electrode is grounded via the predetermined resistance.

Semiconductor differential circuit, oscillation apparatus, switching apparatus, amplifying apparatus, mixer apparatus and circuit apparatus using same, and semiconductor differential circuit placement method

A variable capacitor element including: a buried electrode layer of a conductivity type different from a semiconductor substrate; a wiring layer connected to the lead portion of the buried electrode layer; a pair of capacitive insulating films that are formed as regions having mutually opposing adjacent sides in a plane shape on a portion of the buried electrode layer excluding the lead portion; an insulator layer formed on the border region of each outside of the pair of capacitive insulating films in a direction perpendicular to the adjacent sides; a pair of conductor layers formed both on the respective capacitive insulating films and on the respective insulator layers; and wiring layers that are connected respectively to lead portions of the pair of conductor layers above the insulator layer. The capacitance value between the buried electrode layer and each of the conductor layers can be changed by changing the voltage between the buried electrode layer and the conductor layers. A parasitic capacitance between the respective variable capacitor elements is reduced.

Variable capacitor element and integrated circuit having variable capacitor element

A high-Q inductor for high frequency, having a plurality of inductor elements formed in a plurality of IC wiring layers with a connection formed therebetween. The directions of the magnetic fields generated by the respective inductor elements are substantially the same. With this construction, the section of the inductor is increased reducing the serial resistance component and an influence of a skin effect in a high-frequency range is eliminated increasing the Q value.

High-Q inductor for high frequency

A frequency synthesizer is provided with a prescaler and a counter which output a signal having a frequency generated by frequency-dividing an output signal of a VCO a reference frequency divider for frequency-dividing a frequency of a reference signal of a reference signal source a frequency adjusting meas operated in such that a frequency error between the output signal of the counter and the output signal of the reference frequency divider is detected, and in response to this detection result, such a signal is outputted by which either a capacitor value or an inductor value employed in a resonant circuit of the VCO is switched; and also a bias control means for applying an arbitrary voltage V to a control voltage terminal of the VCO so as to bring an output signal of a charge pump into a high impedance state when the frequency adjusting means is operated. Since the resonant frequency of the resonant circuit is changed in response to an actual oscillation frequency of the VCO the frequency synthesizer can be phase-locked at a desirable frequency. Also, since the VCO can be manufactured in the IC form, the compact VCO can be made in low cost.

Method and apparatus for synthesizing high-frequency signals for wireless communications

In a frequency divider in which a dividing number defined by the ratio of an input frequency to an output frequency is changed between two states of M and M+1 (M is an integer), the time point when the dividing number becomes M+1 is randomized on the time axis with the average dividing number being maintained at M+1/N (N is an integer).

Growing community of inventors

Nishinomiya, Japan

Yukio Hiraoka