Adeia Semiconductor Bonding Technologies Inc.

Yukio Hashimoto

Ilyas Mohammed

Rajesh Katkar

Laura Wills Mirkarimi

Debabrata Gupta

Belgacem Haba

Hiroaki Sato

Philip Damberg

Norihito Masuda

Tomoo Iijima

Yoshikuni Nakadaira

Hideki Kotake

Kiyoshi Hyodo

Inetaro Kurosawa

Toku Yoshino

A microelectronic assembly includes first and second surfaces, a first thin conductive element, a first conductive projection, and a first fusible mass. The first thin conductive element includes a face that has first and second regions. The first conductive projection covers the first region of the first face. A barrier may be formed along a portion of the first region. The second face includes a second conductive projection that extends away therefrom. The first fusible metal mass connects the first conductive projection to the second conductive projection such that the first surface of the first face is oriented toward the second surface of the second substrate. The first mass extends along a portion of the first conductive projection to a location toward the first edge of the barrier. The barrier is disposed between the first thin element and the first metal mass.

Interconnect structure

A microelectronic assembly may include a substrate containing a dielectric element having first and second opposed surfaces. The dielectric element may include a first dielectric layer adjacent the first surface, and a second dielectric layer disposed between the first dielectric layer and the second surface. A Young's modulus of the first dielectric layer may be at least 50% greater than the Young's modulus of the second dielectric layer, which is less than two gigapascal (GPa). A conductive structure may extend through the first and second dielectric layers and electrically connect substrate contacts at the first surface with terminals at the second surface. The substrate contacts may be joined with contacts of a microelectronic element through conductive masses, and a rigid underfill may be between the microelectronic element and the first surface. The terminals may be usable to bond the microelectronic assembly to contacts of a component external to the microelectronic assembly.

Microelectronic assembly comprising dielectric structures with different young modulus and having reduced mechanical stresses between the device terminals and external contacts

A microelectronic assembly includes a first surface and a first thin conductive element exposed at the first surface and having a face comprising first and second regions. A first conductive projection having a base connected to and covering the first region of the face extends to an end remote from the base. A first dielectric material layer covers the second region of the first thin element and contacts at least the base of the first conductive projection. The assembly further includes a second substrate having a second face and a second conductive projection extending away from the second face. A first fusible metal mass connects the first projection to the second projection and extends along an edge of the first projection towards the first dielectric material layer.

An interconnect element is provided. A monolithic dielectric element has a first exposed major surface, a plurality of first recesses extending inwardly from the first major surface, and a second exposed major surface remote from the first major surface, a plurality of second recesses extending inwardly from the second major surface. A plurality of first metal interconnect patterns are embedded in the plurality of first recesses and extend in one or more directions along the first major surface. A plurality of second metal interconnect patterns are embedded in the plurality of second recesses and extend in one or more directions along the second major surface. A plurality of non-hollow metal posts extend through the dielectric element between at least some of the plurality of first metal interconnect patterns and at least some of the plurality of second metal interconnect patterns.

Structure and method of making interconnect element having metal traces embedded in surface of dielectric

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Hitachinaka, Japan

Yukio Hashimoto