Kabushiki Kaisha Toshiba

Tokyo Shibaura Denki Kabushiki Kaisha

Nippon Hoso' Kyokai

Oki Data Corporation

Toshiba Tungaloy Co., Ltd.

Science and Creative Co., Ltd.

Koya-sha Co., Ltd.

Yukio Endo

Nozomu Harada

Yoshitaka Egawa

Okio Yoshida

Yoshiyuki Matsunaga

Shinji Ohsawa

Nobuo Nakamura

Yoriko Tanaka

Nagataka Tanaka

Hiromi Kusakabe

Hidenori Shibata

Tadashi Sugiki

Yasuaki Nishida

Hiroyuki Yamamoto

Akihiko Furukawa

Ryohei Miyagawa

Ikuko Inoue

Masayuki Nishiki

Nobuhito Matsushiro

Fumio Izawa

Yuji Ide

Hiroki Miura

Masato Nagamatsu

Sohei Manabe

Makoto Hoshino

Shigeo Yoshikawa

Yoshihito Koya

Kazuyuki Mitani

Hiroshi Ohtake

Tadashi Matsuoka

Yoshiki Iino

Masahide Abe

Nahoko Nohmi

Tsuyoshi Arakawa

Mineo Iwasawa

Yoshiyuki Tomizawa

Junichi Andoh

Natsue Sakaguchi

Masayoshi Ueki

Norio Otake

An image pickup apparatus comprising an array of unit cells, vertical signal lines, and a control circuit. The unit cells are arranged in rows and columns. Each unit cell has a light-receiving device for receiving light and generating an electric charge corresponding to the light, a charge-accumulating section for accumulating the electric charge generated by the light-receiving device, a transfer device for transferring the electric charge from the light-receiving device to the charge-accumulating section, and a charge-limiting device for limiting the electric charge accumulated in the charge-accumulating section. The vertical signal lines extend along the columns of unit cells, respectively, each for receiving a electric data item corresponding to the electric charge accumulated in the charge-accumulating section of any unit cell of the associated column. The control circuit controls each of the unit cells, causing the charge-limiting device to limit the charge generated by the light-receiving device during a first period and transferred to the charge-accumulating section through the transfer device. The charge generated by the light-receiving device during a second period following the first period and transferred to the charge-accumulating section through the transfer device is added to the electric charge accumulated in the charge-accumulating section.

Amplification type image pickup apparatus and method of controlling the amplification type image pickup apparatus

A look-up table outputs an initial value, an inclination of a straight line and a correction value in response to an entry-of a high-order bit string of an operand. An offset circuit calculates an offset of the low-order bit string. A correction circuit outputs the initial value obtained by adding the correction value to at least one of the initial value and the inclination when the correction is necessary. A multiplier calculates a product of the inclination and the offset. An adder calculates the sum of the initial value and the product.

Arithmetic unit for approximating function

In a CMOS image sensor, current leakage after a series of noise removing operations has been completed is suppressed in a read operation for each horizontal line, thereby suppressing image noise occurring on the output display screen of the image sensor. There are provided signal storage regions for storing the signals read from the unit cells in the same row selected in the imaging area onto vertical signal lines and horizontal select transistors for sequentially selecting and reading the signals stored in the individual signal storage regions and transferring them to read horizontal signal lines. At least in the period during which the signals are read from the signal storage regions, one of the drain and source of the transistor electrically connected to the signal path between the vertical signal line and horizontal signal line is biased in the reverse direction with respect to the substrate region. Two adjacent ones of the horizontal select transistors form a pair. The horizontal select transistors in each pair share one of the source/drain regions so as to be connected to the horizontal signal line in common, and the others of the source/drain regions are connected to the vertical signal line individually.

High-speed solid-state imaging device capable of suppressing image noise

Disclosed is a solid-state imaging device comprising pickup circuit formed by the arrangement of a unit cell in two dimensions, a plurality of reading lines provided in a horizontal direction corresponding to each pixel row in the pickup region to transmit the reading drive signal &#x3c6;READi for driving each reading circuit of the unit cell of respectively corresponding pixel row, a vertical drive selection circuit configured to drive the reading circuit by selectively supplying the reading drive signal to these reading lines, and first row selection circuit and a second row selection circuit configured to control the vertical drive circuit so as to drive reading circuit of each pixel row on the basis of the first pulse and the second pulse &#x3c6;ROREAD and &#x3c6;ESREAD respectively. The solid-state imaging device is capable of controlling a minimum electric charge accumulation time in the photodiode to less than 1H (a horizontal cycle) and is capable of conducting an extremely high-speed shutter operation.

CMOS imaging device for amplifying and fetching signal charge

A method for obtaining spectral sensitivity characteristics of a color image input device such as a color scanner or a like is provided. The most optimum spectral sensitivity characteristics of the color image input device can be obtained by amending CIE XYZ color matching functions so that X, Y and Z values of two color stimuli perceived to be the same in color by observation under a specific illuminant are made equal and by performing linear transformation on the amended color matching function.

Method of deriving spectral sensitivity characteristics for color image inputting device and apparatus for same

A solid-state imaging device includes unit cells, arranged in a matrix of rows and columns, each having a photodiode for photoelectrically converting incident light to store signal charges, a readout transistor Td for reading out the signal charges and amplifying transistor Tb for amplifying signals readout at a detection node, a plurality of vertical shift registers for generating signal charge readout pulses ESi, DRi, ROi and a voltage switching circuit for setting a voltage VDR of the readout pulse DRi for dynamic range control lower than voltages of both a readout pulse ESi for an electronic shutter and a usual readout pulse ROi. The solid-state imaging device provides excellent images without clipping from a small signal region to large signal region.

Solid-state imaging device with dynamic range control

In a solid state image sensor device comprising a cell area wherein unit cells each having photoelectric diodes are arranged in a matrix form on a semiconductor substrate, the cell area being composed of a photo-sensitive pixel region for sensing an image, and an optical black pixel region for defining an optical black level, and a vertical shift register for selecting the unit cells of the image sensing cell array, in a group along each of horizontal lines, and vertical signal lines, each of which reads each of signals from the unit cells selected by turning on an address register by means of the vertical shift register, the vertical signal lines in the optical black pixel region are connected with each other through a wiring. Since the vertical signal lines in the optical black pixel region are connected with each other by a wiring, even if outputs from an optical black pixel region vary in the pixels, the outputs are made averaged and uniform and a variation in fixed pattern noises between the horizontal lines are reduced.

Solid state image sensor device free of influence on optical black level by signal potential change of optical black pixels

A semiconductor circuit includes: a first stage block including first stage dynamic circuits, configured to output a predischarged result to blocks cascade connected to later stages, each of the first stage dynamic circuit includes predischarge elements connected to dynamic nodes of the first stage dynamic circuits to predischarge the dynamic nodes, configured such that the dynamic nodes are precharged with a predetermined cycle; a predischarge signal generating circuit configured to generate a predischarge signal to actuate the respective predischarge elements before precharge timing of the dynamic nodes of the first stage dynamic circuits; and next stage blocks including next stage dynamic circuits, configured to output predischarge results to blocks cascade connected to later stages, each of the next stage dynamic circuit configured to input the predischarge result of the previous block so as to predischarge dynamic nodes, configured such that the dynamic nodes are precharged with a predetermined cycle.

Semiconductor circuit and predischarge method of semiconductor circuit

A solid-state imaging device with a variable (continuous) electronic shutter function comprises an imaging area where unit cells with photodiodes acting as pixels are arranged two-dimensionally, read lines for driving the read transistors in each pixel row, vertical selection lines for driving the vertical selection transistors in each pixel row, a vertical driving circuit for selectively driving vertical selection lines, vertical signal lines for outputting the signal from each unit cell in the pixel rows driven sequentially, and a row selection circuit for controlling the vertical driving circuit in such a manner that the vertical driving circuit drives the read transistors in each pixel row with the desired signal storage timing and signal read timing twice in that order and thereby drives the vertical selection transistors in the pixel row in synchronization with the signal read timing.

Solid-state imaging device

A flip-flop circuit consists of a conventional pulse-drive flip-flop plus a clock driver and a local pulse generator that generates a pulse signal according to the output of the clock driver. The flip-flop circuits of this kind are used to form, for example, a shift register in which the clock drivers are connected in series from the last stage toward the first stage. The clock driver in the last stage receives a clock signal, which is successively supplied to the flip-flop circuits from the one in the last stage toward the one in the first stage. This arrangement prevents a data-pass-through problem, assures a sharp waveform of pulse signals, and reduces the size of each clock driver. This type of flip-flop circuits may be used to form logic circuits such as N-bit registers and N-bit shift registers.

Logic circuit employing flip-flop circuit

An amplifying solid-state image pickup device comprises an image pickup region formed by two-dimensionally arranging photosensitive cells, each of the photosensitive cells including photoelectric conversion means, signal charge storage means, signal charge ejection means, row select means, and amplification means on a semiconductor substrate, a plurality of vertical select lines arranged in the image pickup region in a row direction, vertical select means for driving the plurality of vertical select lines, a plurality of vertical signal lines arranged in the column direction to read the outputs of the amplification means, noise suppression means provided at the ends of the plurality of vertical signal lines to capture and deduct noises and signals appearing on the plurality of vertical signal lines at time differences, horizontal select lines arranged in a column direction, horizontal read means for relaying the outputs of the horizontal select lines and the noise suppression means, horizontal select means for driving the horizontal read means, and charge adding means for adding the signal charges read to the vertical signal lines.

Amplifying solid-state image pickup device and operating method of the

A solid-state imaging apparatus which effects an electronic shutter operation comprises a solid-state imaging device made up of a plurality of photosensitive pixels arranged in a matrix on a semiconductor substrate, a driving circuit for driving the solid-state imaging device and also controlling the photoelectric conversion time of the photosensitive pixel, a vertical CCD for clipping a first signal obtained during a longer photoelectric conversion time in the solid-state imaging device, at a specified level or above, and then adding the clipped signal to a second signal obtained during a shorter photoelectric conversion time, and a signal processing circuit for amplifying and outputting the added signal, and setting an amplification degree for the second signal to a value larger than an amplification factor for the first signal.

Solid-state imaging apparatus

Growing community of inventors

Yokohama, Japan

Yukio Endo