Kabushiki Kaisha Toshiba

Tokyo Shibaura Denki Kabushiki Kaisha

Yukinori Tsuruta

Nagataka Seki

Kazuto Kawakami

Kohsaku Ichikawa

Yuji Hashiya

An off-gate circuit for a GTO thyristor comprises a power source for supplying current to the circuit at a predetermined voltage, and a switching circuit connected to the power source for supplying off-gate current to the GTO thyristor at least two different current rates.

Off-gate circuit for a GTO thyristor

A fault detector apparatus for a power converter in which a plurality of GTOs, functioning at a predetermined potential, are used. The apparatus includes a first fault-detecting circuit, coupled to the gate-cathode path of one of the GTOs, for generating a first fault signal when this GTO malfunctions, a second fault-detecting circuit, coupled to the gate-cathode path of another one of the GTOs, for generating a second fault signal when this GTO malfunctions, a photocoupler for transmitting a DC-isolated optical signal corresponding to the first fault signal, and one optical fiber system for transmitting a DC-isolated output signal, corresponding to the logical sum of the optical signal transmitted by the photocoupler and the second fault signal, to external circuits set at a potential different from the potential at which the GTOs are arranged. The fault-detecting circuits are provided in the same number as the GTOs. The fault-detecting circuits are coupled by the optical signals.

Fault detector apparatus having serial fault-detection signal path

There are arranged an oscillator for generating a first pulse signal on which the AC output frequency of the inverter is based, a delay circuit for generating a second pulse signal delayed for a predetermined period of time from the first pulse signal, and a ring counter for generating responsive to the second pulse signal a phase reference signal corresponding in phase to the AC output of the inverter. An ON pulse is generated responsive to the second pulse and the phase reference signal and an OFF pulse responsive to the first pulse and the phase reference signal. A negative bias signal is generated following the OFF pulse. At the time of operation stop the negative bias signal following the ON and OFF pulses is applied to GTO thyristors simultaneously.

Growing community of inventors

Sagamihara, Japan

Yukinori Tsuruta