Matsushita Electric Industrial Co., Ltd.

Yukihiro Yagi

Masayuki Nakaimuki

Shinichi Takahashi

Jeff M Huard

Hisao Kobayashi

Masakazu Urade

Katsuhiko Hashimoto

Sachiko Nishii

A closed-caption decoder which uses separate clock generators to produce the sampling frequencies for the clock run-in signal and the data portion of the closed-caption signal. Each of the clock generators generates its signal from a common 12 MHz reference clock signal. The timing of the sampling clock signal for the closed-caption data is advanced at the start of the sampling interval to reduce the total timing errors in the sampling of the closed-caption data. Additionally, the decoder can adaptively select one of four edges of the clock run-in signal to use as its synchronizing reference. Furthermore, the decoder may be adapted to recognize more than one start byte pattern.

Closed-caption decoder circuit having robust synchronization features

A circuit and method of data slicing a television signal comprises: an extractor 2 for extracting a specific component from the television signal of analog form; a slicer 3 for slicing the specific component of the television signal produced by the extractor 2 and converting it to its digital form; a decoder 4 for decoding an output of the slicer 3 for display; an initial value storage 10 for storing an initial value of the slice level; slice level controllers 7 and 8 for varying the initial slice level at a predetermined rate; a signal detector 11 for examining whether or not the digitized specific component from the slicer 3 is a desired multiplex signal; a temporary slice level memory 13 for storing the upper and lower levels of the desired multiplex signal detected by the signal detector 11; a calculator 9 for calculating an optimum value of the slice level from the upper and lower levels of the multiplex signal stored in the temporary slice level memory 13; a slice level storage 6 for storing the optimum slice level calculated by the calculator 9; and a controller 14 for selectively feeding the slicer 3 with the optimum slice level retrieved from either the slice level storage 6 or the slice level controllers 7 and 8 according to a resultant judgment of the signal detector 11.

Data slicing circuit and method

Data slice circuit

Growing community of inventors

Kyoto, Japan

Yukihiro Yagi