Fuji Electric Co., Ltd.

Kojin Co., Ltd.

Yuki Inaba

Motohito Hori

Yoshinari Ikeda

Shin Soyano

Takehito Shimatsu

Hideyo Nakamura

Takayuki Hirose

Daisuke Inoue

Michihiro Inaba

Tetsuya Sunago

Taiki Satou

A semiconductor device includes circuit substratesandincluding circuit pattern layers, a semiconductor elementmounted to the circuit pattern layer, a connecting pinconnecting the semiconductor elementto the circuit pattern layer, a pin-shaped terminalconnected to the circuit pattern layer, a sealing membersealing the circuit substratesand, the semiconductor element, and the connecting pin, and an external terminalincluding a flat plate portionand an extending portionbent from the flat plate portionand extends away from the circuit substrate, in which the flat plate portionis connected to the pin-shaped terminaland arranged in parallel with the circuit pattern layer, and the extending portionis provided in a range of a width in a transverse direction of the sealing member

Semiconductor device

A semiconductor device includes a base plate, a plurality of semiconductor units provided in parallel on the base plate, the plurality of semiconductor units implementing a pair, each semiconductor unit including a semiconductor chip and a rod-shaped unit-side control terminal, the unit-side control terminal being connected to the semiconductor chip, the unit-side control terminal extending opposite to the base plate; and an interface unit including a box-shaped accommodating portion, the accommodating portion being provided on the plurality of semiconductor units, the accommodating portion including an internal wiring and a rod-shaped external-connecting control terminal, the internal wiring being connected to each of the plurality of the unit-side control terminals extending from the plurality of semiconductor units, the external-connecting control terminal extending to the outside opposite to the semiconductor units, the external-connecting control terminal being connected to the internal wiring.

Semiconductor device, method for manufacturing semiconductor device, and interface unit

A semiconductor device includes a conductive plate having a front surface on which a semiconductor element is mounted and a sealing resin sealing therein at least the front surface of the conductive plate. The conductive plate includes a structure that traps bubbles in a region where flows of the injected sealing resin merge. The conductive plate has a rectangular shape. The sealing resin is injected from a single inlet on a first longitudinal side of the conductive plate. The region where the flows of the sealing resin merge is a region of a corner of a second longitudinal side that across the semiconductor element, opposes the first longitudinal side from which the sealing resin is injected.

Semiconductor device and method of manufacturing a semiconductor device

The semiconductor device includes a multi-layered substrate having an insulating plate and a circuit plate, a semiconductor chip having a front surface attached with a main electrode and a control electrode formed thereon, and a back surface fixed to the circuit plate, a first wiring substrate which includes a first conductive member and is placed so as to face the main electrode connected electrically to first conductive member, a second wiring substrate which includes a second conductive member, is placed so as to face the control electrode, and has an opening, and a conductive post having one end and another end, the one end being connected electrically and mechanically to the control electrode, and the other end being connected electrically and mechanically to the second conductive member. The first conductive member is thicker than the second conductive member, and the first wiring substrate is disposed within the opening.

In a power semiconductor module, the 0.2% yield strength of solder under a lead terminal that bonds the lead terminal and a semiconductor element is set to be lower than the 0.2% yield strength of solder under the semiconductor element that bonds the semiconductor element and an insulating substrate. As a result, the lead terminal is expanded with self-heating by energization of the semiconductor element, and stress is applied to the semiconductor element via the solder under the lead terminal. However, the solder under the lead terminal with low% yield strength reduces the stress that is applied to the semiconductor element. Thus, the reliability of a surface electrode of the semiconductor element that is bonded to the solder under the lead terminal is improved.

Power semiconductor module

A perpendicular magnetic recording medium is disclosed. The perpendicular magnetic recording medium includes a first layer, and a second layer positioned immediately below the first layer. Among the materials in the first layer and the second layer, if the interface energy when two different materials&#x2014;material a and material b&#x2014;are in contact is defined as Ei(a//b), the surface energy when material a exists independently is defined as Es(a), and the energy resulting by subtracting the sum of the respective surface energies (&#x3a3;Es) from the interface energy is defined as G(a//b), then when G(1//3)&#x3c;G(1//4) holds, either G(2//4) or G(1//3) is the minimum among G(1//3), G(1//4), G(2//3) and G(2//4), and when G(1//3)&#x3c;G(1//4) does not hold, G(2//4) is the minimum among G(1//3), G(1//4), G(2//3) and G(2//4).

Perpendicular magnetic recording medium having tailored granular layers

Provided are a perpendicular magnetic recording medium and a method for manufacturing the same, the perpendicular magnetic recording medium including an alloy (FePt, FePd, or CoPt) having a large Kvalue with an L1type ordered structure, and obtained with achievement of controlled crystal orientation and thin film formation without heating. Specifically, in the perpendicular magnetic recording medium, at least a nonmagnetic seed layer, a nonmagnetic underlayer, and a magnetic layer are formed in this order on a nonmagnetic substrate. The nonmagnetic seed layer includes a MgO layer and a metal layer having a body-centered cubic (bcc) structure. The nonmagnetic underlayer has a NaCl type structure of one selected from the group consisting of MgO, NiO, TiO, CrN, Ti carbides, and Ti nitrides. The magnetic layer includes an alloy selected from the group consisting of FePt, FePd, and CoPt having an L1type ordered structure.

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Matsumoto, Japan

Yuki Inaba