Renesas Electronics Corporation

Anritsu Corporation

Yuki Higuchi

Masato Hirai

Takayuki Awano

Kosuke Fuwa

Takeshi Kuwano

Daiki Kano

Kazunori Aoki

According to one embodiment, a mobile terminal testing device which tests a mobile terminal including a plurality of transmitting antennas by transmitting/receiving radio signals between the mobile terminal testing device and the mobile terminal, includes a radio signal processing module configured to transmit and receive radio signals to and from the mobile terminal and a controller configured to cause the mobile terminal to switch one from another among the plurality of transmitting antennas by a predetermined radio signal transmitted to the mobile terminal via the radio signal processing module.

Mobile terminal testing device and transmitting antenna testing method

The speed of pen position detection is improved without increasing the circuit area and the current consumption. A sampling circuit samples a signal and outputs sampling data. A arithmetic circuit calculates a real part and an imaginary part of the sampling data. The arithmetic circuit classifies the real part of the sampling data into one of a plurality of groups and classifies the imaginary part of the sampling data into one of the groups according to an order of output of the sampling data from the sampling circuit. Then, the arithmetic circuit adds together real parts of sampling data belonging to a group and adds together imaginary parts of sampling data belonging to a group for each of the groups, and calculates amplitude and phase of the signal by using an addition result of the real parts and an addition result of the imaginary parts of each of the groups.

Semiconductor device, position detection device, and control method of semiconductor device

Provided is a mobile terminal test apparatus that can shorten a carrier aggregation testing time. The mobile terminal test apparatus includes a call processing units-to-that transmits and receives a wireless signal between each of the call processing units-to-and a mobile terminaland makes a call connection suitable for testing conditions as a component carrier between each of the call processing units-to-and the mobile terminaland a control unitthat causes the mobile terminalto perform a handover, and that applies parameters for a SCC that is designated, as parameters for a PCC that is a handover destination, to the call processing unit-that corresponds to a PCC, and applies parameters for the pre-handover PCC to the call processing unit-that corresponds to the SCC that are designated and thus connects the SCC.

Mobile terminal test apparatus and parameter replacement method for use in mobile terminal test apparatus

In order to reduce occurrence of a fetching error of a digital signal, caused by a power-source noise, there is provided a semiconductor device provided with a switching circuit for executing a switching operation according to a pulse control signal and a digital signal hold circuit for fetching a digital signal. The digital signal hold circuit includes a mask signal generation circuit for generating a mask signal from the pulse control signal, the mask signal being for use in keeping the digital signal from being fetched during a time period of power-source noise occurrence caused by the switching operation, and the digital signal is not fetched during the time period of power-source noise occurrence while the digital signal is fetched during a time period of power-source noise nonoccurrence.

Semiconductor device and method for fetching data

Noise reduction circuit includes first and second reset signal generation circuits generating first and second reset signals activated when a data input signal goes to a low level or a high level and are deactivated in synchronization with a clock signal when a high or low level is maintained, and first and second counter circuits that count an inverted signal of clock signal and are reset by the first or second reset signal. The noise reduction circuit further includes a data output circuit including a selector circuit and an output flip-flop circuit that outputs a signal selected by the selector circuit in synchronization with the clock. The selector circuit selects and outputs any of: signal fixed at a high level or low level, and output signal of the output flip-flop circuit, according to logic levels of output signals of the first and second counter circuit.

Noise reduction circuit and semiconductor device provided with noise reduction circuit

A noise reduction circuit includes first and second reset signal generation circuits that generate first and second reset signals that are activated when a data input signal goes to a low level or a high level and are deactivated in synchronization with a clock signal when a high level or a low level is maintained, and first and second counter circuits that count an inverted signal of the clock signal, and are reset by the first or second reset signal. The noise reduction circuit further includes a data output circuit that includes a selector circuit and an output flip-flop circuit that outputs a signal selected by the selector circuit in synchronization with the clock, wherein the selector circuit selects and outputs any of: a signal fixed at a high level or a low level, and an output signal of the output flip-flop circuit, according to logic levels of output signals of the first and second counter circuit.

Growing community of inventors

Kanagawa, Japan

Yuki Higuchi