Shinko Electric Industries Co., Ltd.

Yukari Chino

Tomoharu Fujii

Hiroshi Taneda

Hideki Ito

A wiring board includes an insulating layer that is formed by using insulating resin and a wiring layer that is formed on a surface of the insulating layer. The wiring layer includes a first area in which a wire is formed, and a second area that includes a pad to which the wire formed in the first area is connected and that has a smaller wire width than the first area. The insulating layer includes a conductor portion that is formed by using a conductor in only a range that overlaps with the second area in plan view, and that is sandwiched between insulating resin.

Wiring board

A wiring board includes a first interconnect layer, a first insulating layer covering the first interconnect layer, a second interconnect layer, thinner than the first interconnect layer, formed on the first insulating layer and having an interconnect density higher than that of the first interconnect layer, and a second insulating layer formed on the first insulating layer and covering the second interconnect layer. The first insulating layer includes a first layer including no reinforcing material, and a second layer including a reinforcing material. The first and second layers include a non-photosensitive thermosetting resin as a main component thereof. The first layer has a coefficient of thermal expansion higher than that of the second layer, and the second insulating layer includes a photosensitive resin as a main component thereof. The second interconnect layer includes an interconnect formed directly on and electrically connected to the first interconnect layer.

Wiring board, laminated wiring board, and semiconductor device

A semiconductor package includes: a semiconductor chip: a first insulating layer, wherein the semiconductor chip is embedded in the first insulating layer such that the first surface and the side surface of the semiconductor chip are covered by the first insulating layer; a wiring structure on the first surface of the first insulating layer and comprising an insulating layer and a wiring layer; an outermost wiring layer on the wiring structure and having: a reinforcing wiring pattern; and a via wiring which penetrates the reinforcing wiring pattern and electrically connected to the reinforcing wiring pattern, wherein the via wiring is formed through the insulating layer of the wiring structure and electrically connected to the wiring layer of the wiring structure; a second insulating layer on the wiring structure to cover the outermost wiring layer.

Semiconductor package and manufacturing method thereof

A high-frequency line structure includes a multi-layered resin substrate in which insulating layers of a resin are laminated. A high-frequency-signal input part is arranged on the resin substrate to input a high-frequency signal and supply the high-frequency signal to the resin substrate. A high-frequency-signal output part is arranged in the resin substrate to receive the high-frequency signal from the input part and output the received high-frequency signal. A first metal layer is arranged to encircle the input and output pads and electrically insulated from the input and output parts. A second metal layer is arranged on the resin substrate. A plurality of penetration vias are arranged in the resin substrate to encircle the input part and the output part, and each penetration via being connected to the first and second metal layers.

Growing community of inventors

Nagano, Japan

Yukari Chino