Marvell International Limited

Qlogic Corporation

Yujun Si

Theodore Curt White

Stanley Ka Fai Cheong

Paul B Ricci

Mohammad M Negahban

A disk drive system comprising a disk controller and a buffer memory. The disk controller is configured to receive, from a host, data to be written to a disk, and read, from the disk, data to be transmitted to the host. The buffer memory is configured to store the data read from the disk prior to the data read from the disk being transmitted to the host, and store the data received from the host prior to the data received from the host being written to the disk. The disk controller is further configured to correct errors in the data read from the disk prior to the data read from the disk being stored in the buffer memory.

System and method for in-line error correction for storage systems

A disk controller comprising a disk formatter configured to receive data being transferred between a disk and a host. A buffer controller is in communication with the disk formatter, a buffer configured to store the data being transferred between the disk and the host, and the host. The buffer is external to each of the disk controller and the host. The buffer controller is configured to regulate transfer of the data between the buffer and the disk formatter. An error correction module is in communication with the disk formatter and the buffer controller. The error correction module is configured to generate an error correction mask to correct errors in the data. The error correction mask is applied to the data prior to the buffer controller transferring the data to the buffer.

The present invention provides a method and system for performing in-line error correction in a disk storage system. The system includes an error correction (ECC) module; and a first memory storage device, wherein the first memory storage device and the error correction module simultaneously receive data from a storage disk before being buffered for transfer to a host system. The ECC module provides error correction mask before any data is transferred from the first memory storage device to a second memory buffer.

A system includes a receive module, a control module and a read module. The receive module receives a first block that includes first data, a first cyclic redundancy check (CRC) checksum, and a first error-correcting code (ECC) value. The first CRC checksum and the first ECC value include a logical block address (LBA). The control module generates a first derived CRC checksum based on the first data. The first derived CRC checksum does not include the LBA. The read module reads a second block from a parity disk. The second block includes parity data, a second CRC checksum, and a second ECC value. The second CRC checksum and the second ECC value include the LBA.

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Tustin, CA, United States of America

Yujun Si