Emc IP Holding Company LLC

Yujuan Li

Tao Chen

Wei Lin

Rahul Ugale

Yong Colin Zou

Colin Yong Zou

A method, apparatus, and system for decompressing data with a hardware compression/decompression accelerator is disclosed. The operations comprise: submitting compressed data from a plurality of stored compression units in a compression region to a hardware compression/decompression accelerator in a single submission for decompression, wherein each compression unit stores a checksum calculated based on corresponding uncompressed data; decompressing, at the hardware compression/decompression accelerator, the compressed data from the plurality of stored compression units, the decompressing generating combined decompressed data corresponding to the compressed data; calculating, at the hardware compression/decompression accelerator, a first combined checksum based on the combined decompressed data; calculating a second combined checksum based on individual checksums stored in the plurality of compression units; determining whether the first combined checksum matches the second combined checksum; and if the combined checksums match, forwarding the combined decompressed data to a storage device for storage as uncompressed data.

Approach to improve decompression performance by scatter gather compression units and also updating checksum mechanism

A method, apparatus, and system for handling a failure of a hardware cryptography/compression accelerator is disclosed. The operations comprise: detecting that a hardware cryptography/compression accelerator at a first data storage system has failed; determining one or more failed cryptography and/or compression operation tasks that were submitted to the hardware cryptography/compression accelerator but were not completed due to the failure of the hardware cryptography/compression accelerator; and performing a remedial operation in response to the hardware cryptography/compression accelerator failure to prevent a systemic failure.

Method for gracefully handling QAT hardware or CPU software failures by dynamically switching between QAT hardware and CPU software for data compression and decompression

One embodiment provides a computer implemented method of data compression using a hardware accelerator. A first thread pool for compression jobs, and a first polling thread is allocated for polling the status of a hardware accelerator. A compression thread is retrieved from the first thread pool in response to a compression request from a file system. Multiple source data buffers from the file system are aggregated into a compression unit, and a scatter gather list and destination buffer are submitted to the hardware accelerator. A checksum of result data is calculated from the destination buffer. A zlib header is added to the result data, and the checksum is added as a zlib footer to the result data.

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Beijing, China

Yujuan Li