Cadence Design Systems, Inc.

Yujia Li

An-Chang Deng

Xiaohai Wu

Roland Ruehl

Walter J Ghijsen

Tao Hu

Various techniques implement an electronic design with hybrid analysis techniques. An activity map is identified or generated for an electronic design. The electronic design is reduced into a reduced electronic design at least by applying a plurality of reduction processes to different portions of the electronic design based in part or in whole upon the activity map. Transient behaviors of the electronic design may be determined or predicted at least by performing one or more transient analyses on a representation of the electronic design with a simulation start point based in part or in whole upon the activity map. The electronic design may then be implemented for manufacturing at least by modifying or correcting the electronic design based at least in part upon the transient behaviors.

Methods, systems, and computer program products for implementing an electronic design with hybrid analysis techniques

Various techniques implement an electronic design with electrical analyzes with compensation circuit components. A power pin of a power net may be identified in an electronic design. The electronic design may be reduced into a reduced electronic design at least by applying one or more circuit reduction techniques to at least a portion of the electronic design. At least one load device of a plurality of load devices in the reduced electronic design may be transformed into a transformed load device. One or more design closure tasks may be performed on the electronic design using at least the reduced electronic design and the transformed load device.

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Santa Clara, CA, United States of America

Yujia Li