Fujitsu Corporation

Yuji Yokoyama

Osamu Tsuboi

Koichi Hashimoto

Kenichi Inoue

Kazuo Itabashi

Wataru Futo

A method of manufacturing a semiconductor device on a semiconductor substrate having a first region and a second region. This method beings by forming a transistor in the first region of said semiconductor substrate. This transistor includes a pair of impurity diffusion regions and a gate electrode. Then forming a first insulating film over the first and second regions with this first insulating film covering the transistor in the first region. Thereafter, patterning the first insulating film to selectively remove the first insulating film in the second region. Then forming a second insulating film over the first and second regions. Thereafter, forming at least one contact hole through the second and first insulating film. The contact hole reaches one of the impurity diffusion regions. Finally, forming a conductive layer in the contact hole.

Method of manufacturing a semiconductor device with self-aligned contacts

The semiconductor device comprises an interconnection layerformed on a substrate, a cap insulation filmformed on the upper surface of the interconnection layer, and a sidewall insulation film which is formed on the side walls of the interconnection layerand the cap insulation filmand which includes a larger layer number of insulation filmscovering the side wall of the interconnection layerat the side wall of the cap insulation filmthan a layer number of insulation filmsat the side wall of the cap insulation film. Accordingly, the sidewall insulation film can be thickened at the side wall of the interconnection layer, whereby a parasitic capacitance between the interconnection layerand the electrodesadjacent to the interconnection layerthrough the sidewall insulation film can be low.

Semiconductor device having interconnection layer with multiply layered sidewall insulation film

A semiconductor memory device comprising: a first insulating film covering the upper and side surfaces of a gate electrode; a second insulating film formed on the substrate covering the first insulating film; a pair of contact holes formed through the second insulating film and reaching the impurity diffusion regions; a conductive plug embedded in one of the contact holes; a third insulating film formed on the second insulating film covering the conductive plug, and having a first aperture on the other contact hole; a bit line formed on the third insulating film and connected to the other impurity diffusion region through the first aperture and the other contact hole; a fourth insulating film covering the upper and side surfaces of the bit line; a second aperture formed through the third insulating film in alignment with the fourth insulating film covering the side surface of the bit line; a storage electrode formed to extend over the bit line, insulated from the bit line by the third and fourth insulating films, and electrically connected to the conductive plug through the second aperture.

Semiconductor device with self-aligned contact and its manufacture

The semiconductor device comprises an interconnection layer formed on a substrate a cap insulation film formed on the upper surface of the interconnection layer and a sidewall insulation film which is formed on the side walls of the interconnection layer and the cap insulation film and which includes a larger layer number of insulation films covering the side wall of the interconnection layer at the side wall of the cap insulation film than a layer number of insulation films at the side wall of the cap insulation film . Accordingly, the sidewall insulation film can be thickened at the side wall of the interconnection layer whereby a parasitic capacitance between the interconnection layer and the electrodes adjacent to the interconnection layer through the sidewall insulation film can be low.

Growing community of inventors

Kawasaki, Japan

Yuji Yokoyama