Panasonic Corporation

Matsushita Electric Industrial Co., Ltd.

Panasonic Intellectual Property Management Co., Ltd.

Daikin Industries, Ltd.

Yuji Yamada

Kazuaki Sogawa

Shiro Dosho

Masayoshi Kinoshita

Toru Iwata

Takashi Morie

Junji Nakatsuka

Yoshihide Komatsu

Kouji Okamoto

Tsuyoshi Ebuchi

Shinya Miyazaki

Naoshi Yanagisawa

Shinichi Takahashi

Tsuyoshi Hiraki

A refrigerant cycle apparatus includes a main refrigerant circuit, a bypass circuit, and a controller. The main refrigerant circuit includes a compressor, a heat source-side heat exchanger, a heat source-side expansion valve, and a utilization-side heat exchanger. The controller performs a second operation of opening a hot gas bypass valve in a state in which the compressor is driven before performing a first operation in which the heat source-side heat exchanger serves as a heat absorber for the refrigerant and the utilization-side heat exchanger serves as a radiator for the refrigerant. In the first operation or the second operation, when a difference between a pressure of the refrigerant on the discharge side of the compressor and a pressure of the refrigerant on the suction side of the compressor becomes larger than a first predetermined value, the controller decreases the number of revolutions of the compressor.

Refrigerant cycle apparatus

An interchannel skew adjustment circuit adjusts signal skew between a first channel and a second channel. The circuit includes a phase adjustment circuit configured to receive a signal of the first channel, delay the signal by a discretely variable delay amount, and output a delayed signal; a channel coupling circuit configured to receive the signal output from the phase adjustment circuit and a signal of the second channel, and detect a phase difference between these two signals; and a controller configured to control the delay amount in the phase adjustment circuit based on a result detected by the channel coupling circuit. This interchannel skew adjustment circuit adjusts the interchannel signal skew only at a sender or a receiver, thereby reducing the circuit area and the power consumption.

Interchannel skew adjustment circuit

In a phase adjustment circuit that divides the frequency of a double-frequency clock to obtain a 50% duty-cycle clock, a first &#xbd; frequency division circuit having a phase inversion function generates an intermediate reference clock apart in phase from both a phase reference clock and a phase-adjusted clock. A first phase control circuit controls the phase of the intermediate reference clock to be in a desired phase state with respect to the phase reference clock. A second phase control circuit controls the phase of the phase-adjusted clock to be in a desired phase state with respect to the intermediate reference clock. Thus, when the phase-adjusted clock is adjusted to be close in phase to the phase reference clock, the phase difference between these clocks can be determined correctly and stably even if it varies due to clock jitter.

Phase adjustment circuit

A constant determination unit () determines various constants, that are the magnitude of a charge current outputted from a charge pump circuit (), the time constant of a loop filter (), and the gain of a voltage controlled oscillator (), so as to make the proportionality constant of a natural frequency of a phase locked loop circuit for the input frequency of the phase locked loop circuit and the damping factor to be predetermined values, and outputs various control signals based on the determined constants. The charge pump circuit (), the loop filter (), and the voltage controlled oscillator () modify the magnitude of the charge current, the time constant, and the gain, respectively, in accordance with control signals outputted from the constant determination unit ().

Phase synchronizing circuit

In a PLL circuit, a voltage controlled oscillatorhas two voltage-current conversion circuitsandand a selection circuitfor selecting an output of either one of the voltage-current conversion circuitsand. The output of the voltage-current conversion circuit selected by the selection circuitis inputted to a current controlled oscillator. The one voltage-current conversion circuithas an input thereof connected to an output of a loop filter, while the other voltage-current conversion circuithas an input thereof connected to an input terminalfor evaluating the oscillation characteristics of the voltage controlled oscillator. As a result, time-varying fluctuations in the voltage of the loop filter resulting from a structure in which the input terminal for evaluating the oscillation characteristics of the voltage controlled oscillator is connected to the loop filter via a switch and time-varying fluctuations in the output frequency of the PLL circuit are effectively suppressed.

PLL circuit

The phase-locked loop circuit includes a gain setting circuit for setting a gain of a voltage controlled oscillator, and a time-constant setting circuit for setting a time constant, which is determined by the amount of current in a charge pump circuit and a capacitance value of a loop filter. The gain setting circuit sets the gain to a predetermined value, and the time-constant setting circuit sets the time constant to a predetermined value, whereby the loop band width of the phase-locked loop circuit is set to a desired value.

Phase-locked loop circuit

Growing community of inventors

Osaka, Japan

Yuji Yamada