Sony Corporation

Sony Semiconductor Solutions Corporation

Fujikura Limited

Sony Group Corporation

Yuji Takaoka

Yoshimichi Harada

Yoshihiro Nabe

Hiroshi Asami

Yuta Momiuchi

Makoto Murai

Hiroyuki Yamada

Masami Suzuki

Hirokazu Seki

Kazuki Sato

Kiyohisa Tanaka

Hirokazu Nakayama

Teruo Hirayama

Yukihiro Kamide

Tatsuo Suemasu

Hideyuki Wada

Eiichirou Kishida

Miyoshi Togawa

Masaki Hatano

Makoto Imai

Masanobu Saruta

Hiroshi Ozaki

Masaaki Takizawa

Kazuo Nishiyama

Chiaki Sakai

Shigeki Amano

Emi Nishioka

Naoki Yamashita

Yasuaki Yamamichi

A rewiring regionis provided in a region other than a pixel regionon a front face (pixel formation surface) FA of an imaging elementA mold partis formed around the imaging elementother than on the front face FA. Rewiring layers, andthat connect an external terminal and a padprovided in the rewiring regionare formed via insulating layers, andon a side of the pixel formation surface of the imaging elementand the mold part. Therefore, connection to a substrate can be made possible even if the spacing between the pads is narrowed, a mounting surface of an imaging deviceis also on the side of the pixel formation surface, and reduction in size and height can be achieved.

Imaging device for connection with a circuit element

A semiconductor device including a semiconductor substrate having oppositely facing first and second surfaces, the first surface being an active surface and provided with an electronic element thereon, a pad electrode to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening formed to reach the pad electrode from a bottom surface of the first opening and having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.

Semiconductor device

The present technology relates to a camera module, a production method, and an electronic device that can prevent reduction of optical module positioning accuracy or heat dissipation performance. An image pickup element is joined on one face of a flexible board so that a light receiving surface of the image pickup element is exposed through an opening of the flexible board, and an optical module is joined on an other face of the flexible board. A reinforcing member is joined on the one face of the flexible board at a circumference of the image pickup element and reinforces a joining part of the flexible board where the optical module is joined. The reinforcing member is joined so as to face an area including at least a part of the joining part and is formed so that a part of the circumference of the image pickup element is kept open.

Camera module, production method, and electronic device

Semiconductor device and method of manufacturing the same

A rewiring region is provided in a region other than a pixel region on a front face (pixel formation surface) FA of an imaging element. A mold part is formed around the imaging element other than on the front face FA. Rewiring layers that connect an external terminal and a pad provided in the rewiring region are formed via insulating layers on a side of the pixel formation surface of the imaging element and the mold part. Therefore, connection to a substrate can be made possible even if the spacing between the pads is narrowed, a mounting surface of an imaging device is also on the side of the pixel formation surface, and reduction in size and height can be achieved.

The present technology relates to a semiconductor device including: a solid-state image sensor having a pixel array unit in which a plurality of pixels each having a photoelectric conversion element is two-dimensionally arranged in a matrix; and a flexible printed circuit having wiring adapted to connect a pad portion provided on an upper surface side to be located on a light receiving surface side of the solid-state image sensor to an external terminal provided on a lower surface side opposite to the upper surface side, in which the flexible printed circuit is arranged along respective surfaces of the solid-state image sensor such that a position of an end portion located on the upper surface side becomes a position different from a position in a space above the light receiving surface.

Image sensor package with flexible printed circuits

A semiconductor chip includes a chip body and a plurality of solder-including electrodes provided on an element-formation surface of the chip body. A packaging substrate includes a substrate body, a plurality of wirings, and a solder resist layer, in which the plurality of wirings and the solder resist layer are provided on a front surface of the substrate body. The solder resist layer is provided as a continuous layer on the front surface of the substrate body and the plurality of wirings, and has an aperture on each of the plurality of wirings. The plurality of solder-including electrodes include at least one gap control electrode. The at least one gap control electrode includes a columnar metal layer and a solder layer in order named from side on which the chip body is disposed, and includes an overlap region where the columnar metal layer and the solder resist layer overlap each other, along part or all of an aperture end of the aperture.

Semiconductor device with a gap control electrode and method of manufacturing the semiconductor device

The present technology relates to an imaging element package and a camera module capable of improving reliability. An imaging element package includes a flexible substrate, an imaging element connected to a first surface of the flexible substrate, and a member, bonded to a second surface of the flexible substrate opposite to the first surface with an adhesive, having a linear expansion coefficient different from the flexible substrate, in which in a portion of the adhesive, a slit is formed which intersects with a direction from the imaging element toward an end of the flexible substrate as viewed from a direction perpendicular to the flexible substrate. The present technology is applied to a camera module.

Imaging element package and camera module having a slit formed in an adhesive connecting a flexible substrate and another member to address differences in linear expansion coefficients

A semiconductor chip includes a chip body and a plurality of solder-including electrodes provided on an element-formation surface of the chip body. A packaging substrate includes a substrate body, and one or more conductive layers and a solder resist layer that are provided on a front surface of the substrate body. The solder resist layer is provided as a continuous layer on the front surface of the substrate body and the one or more conductive layers, and has one or more apertures on each of the one or more conductive layers. The plurality of solder-including electrodes include two or more first electrodes having a same function other than a function of power supply. The one or more conductive layers include a continuous first conductive layer. The two or more first electrodes are connected to the continuous first conductive layer. The one or more apertures are confronted with the respective two or more first electrodes.

A semiconductor chip includes a chip body and a plurality of solder-including electrodes provided on an element-formation surface of the chip body. A packaging substrate includes a substrate body, and a plurality of wirings and a solder resist layer that are provided on a front surface of the substrate body. The plurality of solder-including electrodes include a plurality of first electrodes and a plurality of second electrodes. The plurality of first electrodes supply a first electric potential, and the plurality of second electrodes supply a second electric potential different from the first electric potential. The plurality of first electrodes and the plurality of second electrodes are disposed alternately in both a row direction and a column direction, in a central part of the chip body. The plurality of wirings include a plurality of first wirings and a plurality of second wirings. The plurality of first wirings connect the plurality of first electrodes, and the plurality of second wirings connect the plurality of second electrodes.

Semiconductor chip mounted on a packaging substrate

Provided is a semiconductor device that includes a semiconductor chip, and a packaging substrate on which the semiconductor chip is mounted. The semiconductor chip includes a chip body and a plurality of solder-including electrodes that are provided on an element-formation surface of the chip body. The packaging substrate includes a substrate body, and a plurality of wirings and a solder resist layer that are provided on a front surface of the substrate body. The solder resist layer is provided as a continuous layer on the front surface of the substrate body and the plurality of wirings, and has an aperture on each of the plurality of wirings. The aperture has a planar shape elongated in a lengthwise direction of the wiring inside the aperture, with a length of the aperture adjusted in accordance with a thermal expansion coefficient of the packaging substrate.

Semiconductor device with less positional deviation between aperture and solder

A semiconductor apparatus having a through-hole interconnection in a semiconductor substrate. An insulating layer is formed on the semiconductor substrate. A via hole is formed through the semiconductor substrate and the insulating layer. The through-hole interconnection has another insulating layer formed in the via hole and a conductive layer formed thereon. The insulating layer formed in the via hole is formed such as to substantially planarize an inner surface of the via hole.

Growing community of inventors

Kanagawa, Japan

Yuji Takaoka