Sony Corporation

Sony Computer Entertainment Inc.

Yuji Nishitani

Tsuyoshi Ogawa

Hiroshi Asami

Akihiko Okubora

Hidetoshi Kusano

Ken Orui

Tomoshi Ohde

Yoshio Watanabe

Nobuyuki Yasuda

Mitsuru Adachi

Fujio Kanayama

Tetsunori Niimi

Hiroko Jinno

Hironori Mihono

A semiconductor device is provided in which the heat dissipation characteristic of a flip-chip mounted semiconductor chip is improved. A semiconductor device is provided with a substrate, a semiconductor flip-chip mounted on the substrate, a sealing resin layer for sealing around the semiconductor flip-chip. A sealing resin layer for sealing the semiconductor chip is formed around the semiconductor chip. In this semiconductor device, the back surface of the semiconductor chip is exposed and is convex with respect to the upper surface of the sealing resin layer.

Semiconductor device and method of manufacturing semiconductor device

A flip chip mounting method for improving the accuracy of positioning of a semiconductor chip and avoiding a short circuit between protruding electrodes even when the protruding electrodes are formed at smaller spacings. The method comprises: placing a semiconductor chip on a wiring board, the semiconductor chip having protruding electrodes formed at a relatively small spacing and at a relatively large spacing, the wiring board having electrode pads corresponding to the respective protruding electrodes and solder pieces formed on the respective pads; heating the semiconductor chip and the wiring board to a temperature at which only the solder pieces on the electrode pads of greater spacing melt; performing self alignment of the semiconductor chip by the melted solder pieces; and heating the semiconductor chip and the wiring board further to a temperature at which the protruding electrodes and the solder pieces on the electrode pads of smaller spacing melt.

Wiring board, electronic component mounting structure, and electronic component mounting method

The present invention provides a method of manufacturing a multilayer wiring substrate, which can preserve the dimensional stability of a conductor pattern at a fine pitch, solve the restriction on a process from the viewpoint of material selection, and further reduce a manufacturing cost, and a multilayer wiring substrate. A second wiring substrate formed on a supporting sheet made of metal and an adhesive layer are partially stacked on a predetermined region of a first wiring substrate by using the supporting sheet. After the lamination of the second wiring substrate, the supporting sheet is finally etched and removed. The second wiring substrate is stacked only on the portion required to be multilayered on the first wiring substrate to thereby reduce the amount of the construction material of the second wiring substrate.

Method of manufacturing multilayer wiring substrate, and multilayer wiring substrate

A method of manufacturing a multilayer wiring substrate, which can preserve the dimensional stability of a conductor pattern at a fine pitch, solve the restriction on a process from the viewpoint of material selection, and further reduce a manufacturing cost, and a multilayer wiring substrate. A second wiring substrate formed on a supporting sheet made of metal and an adhesive layer are partially stacked on a predetermined region of a first wiring substrate by using the supporting sheet. After the lamination of the second wiring substrate, the supporting sheet is finally etched and removed. The second wiling substrate is stacked only on the portion required to be multilayered on the first wiring substrate to thereby reduce the amount of the construction material of the second wiring substrate.

A multi-chip circuit module on which semiconductor chips are loaded and which is provided with circuit patterns, input/output terminals or the like for interconnecting the semiconductor chips. A multi-layered wiring section () is formed by respective unit wiring layers () to () in such a manner that an upper unit wiring layer is layered on a surface-planarized subjacent unit wiring layer and connected to one another by inter-layer connection by a via-on-via structure. A semiconductor chip () mounted on this multi-layer wiring section () is polished along with the sealing resin layer () for reducing the thickness.

Multi-chip circuit module and method for producing the same

A circuit substrate device composed of a circuit unitand a multi-layer wiring substratein which a pattern conductor of the circuit unitmay be prevented from being warped or inundated. The circuit substrate device includes a circuit unithaving a pattern conductor formed by a thin film technique, and an insulating layer, and a multi-layer wiring substratehaving a connecting terminal portionexposed from its major surface. The circuit unit is formed on a dummy substrate. The circuit unit is connected to the multi-layer wiring substrateso that the pattern conductor is connected to the connecting terminal portion. The dummy substrate is then removed to give a structure comprised of the circuit unitformed on the multi-layer wiring substrate. The pattern conductor of the circuit unitis freed of warping or inundations along the direction of thickness of the circuit unit

Circuit substrate device, method for producing the same, semiconductor device and method for producing the same

To provide a junction structure and a junction method for conductive projection advantageous in that a required reinforcement strength can be obtained while suppressing the amount of a reinforcing resin material supplied to prevent warpage due to curing shrinkage. A conductive projection is joined to the surface of a conductor portion formed at the same level as that of the surface of the insulating layer so that a root portion of the projection is surrounded by a fillet-form resin material. The resin material contains an activator which assists in the junction between the conductive projection and the conductor portion when the resin material is in an uncured state, and is fused by heating to wet and rise the root portion of the conductive projection so as to be in a fillet form. The resin material is cured by an ultraviolet light while excluding the resin material on the conductor portion.

Junction structure and junction method for conductive projection

Method for producing a multi-chip circuit module including a multi-layered wiring section utilizing a via-on-via structure

A circuit substrate device composed of a circuit unit and a multi-layer wiring substrate in which a pattern conductor of the circuit unit may be prevented from being warped or inundated. The circuit substrate device includes a circuit unit having a pattern conductor formed by a thin film technique, and an insulating layer, and a multi-layer wiring substrate having a connecting terminal portion exposed from its major surface. The circuit unit is formed on a dummy substrate. The circuit unit is connected to the multi-layer wiring substrate so that the pattern conductor is connected to the connecting terminal portion . The dummy substrate is then removed to give a structure comprised of the circuit unit formed on the multi-layer wiring substrate . The pattern conductor of the circuit unit is freed of warping or inundations along the direction of thickness of the circuit unit

A wiring circuit block is produced by forming a release layer on one of planarized principal surfaces of a mother substrate, forming an insulating layer on the release layer, patterning the insulating layer and forming a wiring layer on the patterned insulating layer, and separating the insulating layer and wiring layer from the release layer on the mother substrate. The circuit block has components, and deposited on the wiring layer, and is mounted on a base circuit board to provide a wiring device. Also, semiconductor chips are mounted on the circuit block, and the circuit block is mounted on a base circuit board to provide a semiconductor device.

Semiconductor device and its manufacturing method

The invention provides a high-density multilayer printed wiring board and a method for manufacturing a multilayer printed wiring board having high-density wiring that is formed easily. A method for manufacturing a multilayer printed wiring board formed by laminating a plurality of laminates comprises a step for forming a conduction hole on a laminate comprising an insulating board having both sides on which conductive films are formed, a step for electrically connecting between both sides of said laminate through the above-mentioned conduction hole and planarizing the surface, a step for patterning the above-mentioned conductive film desiredly and forming a projection member at a desired position of the above-mentioned conductive film, a step for laminating bonding members having a through hole to which the above-mentioned projection member is inserted, which is served for bonding between the above-mentioned laminates, and the above-mentioned laminates alternately with insertion of the above-mentioned projection member into the above-mentioned throughhole, and a step for press-molding the above-mentioned laminated laminates and bonding members with heating.

Growing community of inventors

Kanagawa, Japan

Yuji Nishitani