Sony Corporation

Sony Semiconductor Solutions Corporation

Yuji Ibusuki

Shinichi Tamari

Mitsuhiro Nakamura

Masahiro Mitsunaga

Tomoya Nishida

Koji Wakizono

Hideo Yamagata

Daisaku Okamoto

Hiroki Tsunemi

Kenji Nagai

To provide a semiconductor device capable of reducing a parasitic capacitance, securing high reliability, and suppressing an increase in manufacturing cost. A semiconductor device is provided which includes a substrate including an embedded insulation film and a semiconductor layer on the embedded insulation film and on which a semiconductor element is formed and a gate electrode on the semiconductor layer, in which the gate electrode includes a band-shaped first electrode portion that extends from a center portion of the semiconductor layer and beyond an end of the semiconductor layer along a first direction in a case where the substrate is viewed from above, and in a cross section in a case where the first electrode portion and the substrate are cut along the first direction, a film thickness of the end of the semiconductor layer is thicker than a film thickness of the center portion of the semiconductor layer.

Semiconductor device and method for manufacturing semiconductor device

A high-frequency semiconductor device, wherein on one surface of a semiconductor substrate, a first insulating layer, an undoped epitaxial polysilicon layer in a state of column crystal, a second insulating layer, and a semiconductor layer are formed in order from a side of the one surface, and a high-frequency transistor is formed in a location of the semiconductor layer facing the undoped epitaxial polysilicon layer with the second insulating layer in between.

High-frequency semiconductor device and method of manufacturing the same

A semiconductor device includes: an epitaxial substrate formed by stacking a plurality of kinds of semiconductors over one semiconductor substrate by epitaxial growth; a field effect transistor of a first conductivity type formed in a first region; a field effect transistor of a second conductivity type formed in a second region; and a protective element formed in a third region. The protective element includes: a first stacking structure formed by etching the epitaxial substrate by vertical etching that proceeds in a stacking thickness direction; and a second stacking structure formed by etching the epitaxial substrate by vertical etching that proceeds in a stacking thickness direction. The protective element has two PN junctions on a current path formed between an upper end of the first stacking structure and an upper end of the second stacking structure via a base part of the first stacking structure and the second stacking structure.

Semiconductor device, manufacturing method thereof, protective element, and manufacturing method thereof

A semiconductor device including at least a p-channel field-effect transistor region formed above a compound semiconductor substrate. The p-channel field-effect transistor region includes an undoped buffer layer; a p-type channel layer formed in contact with the buffer layer; a p-type source region and a p-type drain region formed in the channel layer, being separated with each other; and an n-type gate region formed above the channel layer and between the source region and the drain region. The buffer layer is formed having either a multilayer structure including a hole diffusion control layer with a band gap larger than the channel layer, or a single layer structure including only the hole diffusion control layer.

Semiconductor device

A semiconductor device includes a compound semiconductor substrate; a first conductivity type-channel field-effect transistor region formed on the compound semiconductor substrate, and that includes a first channel layer; a first conductivity type first barrier layer that forms a heterojunction with the first channel layer, and supplies a first conductivity type charge to the first channel layer; and a second conductivity type gate region that has a pn junction-type potential barrier against the first conductivity type first barrier layer; and a second conductivity type-channel field-effect transistor region formed on the compound semiconductor substrate, and that includes a second conductivity type second channel layer, and a first conductivity type gate region that has a pn junction-type potential barrier against the second conductivity type second channel layer.

Semiconductor device and method for manufacturing same

A semiconductor device includes: a compound semiconductor substrate; an n-channel field-effect transistor region formed on the compound semiconductor substrate, and that includes a first channel layer; an n-type first barrier layer that forms a heterojunction with the first channel layer, and supplies an n-type charge to the first channel layer; and a p-type gate region that has a pn junction-type potential barrier against the n-type first barrier layer; and a p-channel field-effect transistor region formed on the compound semiconductor substrate, and that includes a p-type second channel layer, and an n-type gate region that has a pn junction-type potential barrier against the p-type second channel layer.

Growing community of inventors

Kagoshima, Japan

Yuji Ibusuki