Seiko Instruments Inc

Yuji Hishiki

Isamu Fujii

Shinichi Idomukai

Yoshiaki Saka

A low noise and lower power consumption receiver including a CRC error correction circuit which is constructed at low cost, prolongs a life of a battery and enhances a receiving sensitivity. The receiver comprises a data processing unit which continuously determines errors in received data encoded by a CRC code and corrects them by comparing with reference syndrome patterns, a microprocessor circuit including a data RAM connected with local data buses and local address buses and a serial data receiving apparatus including state control means, a synchronizing circuit, an ID comparing circuit and a circuit for gating system clock. The high performance and low power consumption receiver may be realized with less additional circuits, having more flexibility to the increase of services.

Receiver for communication

An IC for communication includes a single oscillating circuit, which is capable of flexibly dealing with the change of data rate or data processing load, and is produced at a low cost and consumes low electric power. In the IC for communication, a frequency multiplying circuit( ) is inserted between the output of an oscillating circuit( ) and a micro-controller circuit( ), or a frequency dividing circuit( ) is inserted between the oscillating circuit( ) and a data receiving circuit( ). A receiving address is stored in a dual port RAM( ). Further, by controlling a receiving frequency of synchronous codes, battery saving efficiency is increased.

Semiconductor integrated circuit for communication and battery saving method for the same

In a selected paging signal type receiving apparatus, a transmission code is received which is arranged by coupling a series of signal codes including a preamble, a sync code, and a message code. Even when signal reception is interrupted, this receiving apparatus can immediately respond to an interference condition and a completion of a signal transmission. In the case of the interference condition, the receiving apparatus can be immediately recovered to the signal reception operation after the interference condition disappears. This selected paging signal type receiving apparatus with a simple arrangement is arranged by a sync signal generator for generating a signal having the same time period as that of the sync code, and reset when the preamble is detected; a receiving circuit intermittently operated in response to the sync signal from a sync signal generator; a sync code detecting circuit and a preamble detecting circuit intermittently operated in response to this sync code; and also a paging code detecting circuit operated only when the sync code is detected.

Method and apparatus for receiving selected paging signal

The dialer IC according to the present invention is capable of expanding an access-pause of the push-button telephone and adapting itself to a wide variety of dialing services.

Semiconductor integrated circuit for a telephone dialer including a

The amplifier circuit is arranged such that an open drain type amplifying circuit is provided on the side of output of a differential amplifying circuit having an active load. In this arrangement, the differential amplifying circuit is brought into a non-operational state, and at the same moment an electric potential of output of the differential amplifying circuit is fixedly set to a predetermined level. Consequently, the open drain type amplifying circuit is surely kept in the non-operational state.

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Chiba, Japan

Yuji Hishiki